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ADRF6655ACPZ-R7 Datasheet(PDF) 30 Page - Analog Devices

No. de pieza ADRF6655ACPZ-R7
Descripción Electrónicos  Broadband Up/Downconverting Mixer with Integrated Fractional-N PLL and VCO
PDF  44 Pages
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Fabricante Electrónico  AD [Analog Devices]
Página de inicio  http://www.analog.com
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ADRF6655ACPZ-R7 Datasheet(HTML) 30 Page - Analog Devices

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ADRF6655
Rev. 0 | Page 30 of 44
CP
REF
PDF
PHASE
OFFSET
POLARITY
CP
CNTL
SRC
DB23
DB22
DB21 DB20 DB19
DB18
DB17
DB16 DB15 DB14 DB13 DB12 DB11 DB10 DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
RMS2 RMS1
RMS0
RS1
RS0
CPM
CPBD
CPB4 CPB3 CPB2 CPB1 CPB0 CPP1 CPP0 CPS
CPC1 CPC0
PE1
PE0
PAB1 PAB0 C3(1)
C2(0)
C1(0)
CPC1 CPC0
00
01
10
11
CPS
0
1
CPP1 CPP0
00
01
10
11
CPB4 CPB3 CPB2 CPB1 CPB0
0
000
0
0
000
1
0
010
0
0
101
0
...
...
...
...
...
1
111
1
CPBD
0
1
CPM
0
1
RS1
RS0
00
01
10
11
RMS2 RMS1
RMS0
00
0
00
1
01
0
01
1
10
0
10
1
11
0
11
1
10 × 22.5°/ICP, MULT
...
31 × 22.5°/ICP, MULT
PFD PHASE OFFSET MULTIPLIER
0 × 22.5°/ICP, MULT
1 × 22.5°/ICP, MULT
4 × 22.5°/ICP, MULT (RECOMMENDED)
BOTH ON
PUMP DOWN
PUMP UP
TRISTATE
OUPUT MUX
SOURCE
INPUT REF
PATH
SOURCE
PFD PHASE OFFSET
MULTIPLIER VALUE
CP
CURRENT
MULTIPLIER
CHARGE
PUMP
CONTROL
PFD EDGE
SENSITIVITY
CONTROL BITS
PFD ANTI-
BACKLASH
DELAY
PE0
0
1
REFERENCE PATH EDGE
SENSITIVITY
FALLING EDGE
RISING EDGE
PAB1 PAB0
00
01
10
11
PFD ANTI-BACKLASH
DELAY
0ns
0.5ns
0.75ns
0.9ns
CHARGE PUMP
CONTROL
0.5 × REFIN (BUFFERED)
CHARGE PUMP CONTROL SOURCE
CONTROL BASED ON STATE OF DB7/DB8 (CP CONTROL)
CONTROL FROM PFD
OUTPUT MUX SELECT
LOCK DETECT
VPTAT
REFIN (BUFFERED)
PFD PHASE OFFSET POLARITY
NEGATIVE
POSITIVE
CHARGE PUMP CURRENT
REFERENCE SOURCE
INTERNAL
EXTERNAL
0.25 × REFIN
CHARGE PUMP
CURRENT MULTIPLIER
1
2
3
4
INPUT REFERENCE
PATH SOURCE
2 × REFIN
REFIN
0.5 × REFIN
2 × REFIN (BUFFERED)
TRISTATE
RESERVED (DO NOT USE)
RESERVED (DO NOT USE)
PE1
0
1
DIVIDER PATH EDGE
SENSITIVITY
FALLING EDGE (RECOMMENDED)
RISING EDGE
...
...
...
...
...
...
...
...
...
...
...
...
Figure 74. Charge Pump, PFD, and Reference Path Control Register (R4)



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