LTC2402 datasheet(26/32 Pages) LINER

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LTC2401/LTC2402

APPLICATIO S I FOR ATIO

ANTIALIASING

One of the advantages delta-sigma ADCs offer over con-

ventional ADCs is on-chip digital filtering. Combined with

a large oversampling ratio, the LTC2401/LTC2402 signifi-

cantly simplify antialiasing filter requirements.

The digital filter provides very high rejection except at

integer multiples of the modulator sampling frequency

(fS), see Figure 26. The modulator sampling frequency is

256 • FO, where FO is the notch frequency (typically 50Hz

or 60Hz). The bandwidth of signals not rejected by the

digital filter is narrow (

≈0.2%)comparedtothebandwidth

of the frequencies rejected.

As a result of the oversampling ratio (256) and the digital

filter, minimal (if any) antialias filtering is required in front

of the LTC2401/LTC2402. If passive RC components are

placed in front of the LTC2401/LTC2402, the input dy-

namic current should be considered (see Input Current

section). In cases where large effective RC time constants

are used, an external buffer amplifier may be required to

minimize the effects of input dynamic current.

The modulator contained within the LTC2401/LTC2402

can handle large-signal level perturbations without satu-

rating. Signal levels up to 40% of VREF do not saturate the

analog modulator. These signals are limited by the input

ESD protection to 300mV below ground and 300mV above

VCC.

Single Ended Half-Bridge Digitizer

with Reference and Ground Sensing

Sensors convert real world phenomena (temperature,

pressure, gas levels, etc.) into a voltage. Typically, this

voltage is generated by passing an excitation current

through the sensor. The wires connecting the sensor to

the ADC form parasitic resistors RP1 and RP2. The excita-

tion current also flows through parasitic resistors RP1 and

RP2, as shown in Figure 27. The voltage drop across these

parasitic resistors leads to systematic offset and full-scale

errors.

In order to eliminate the errors associated with these

parasitic resistors, the LTC2401/LTC2402 include a full-

scale set input (FSSET) and a zero-scale set input

(ZSSET). As shown in Figure 28, the FSSET pin acts as a zero

current full-scale sense input. Errors due to parasitic

resistance RP1 in series with the half-bridge sensor are

removed by the FSSET input to the ADC. The absolute full-

scale output of the ADC (data out = FFFFFFHEX ) will occur

INPUT FREQUENCY

–60

–40

24012 F26

–80

–100

fS/2

–120

–140

–20

Figure 26. Sinc4 Filter Rejection

VFULL-SCALE ERROR

SENSOR

SENSOR OUTPUT

RP1

IEXCITATION

–

VOFFSET ERROR

–

RP2

24012 F27

VCC

LTC2401

FSSET

GND

SCK

VIN

SDO

ZSSET

3-WIRE

SPI INTERFACE

24012 F03

RP2

RP5

IDC = 0

RP1

RP4

IDC = 0

IEXCITATION

RP3

IDC = 0

Figure 28. Half-Bridge Digitizer with

Zero-Scale and Full-Scale Sense

Figure 27. Errors Due to Excitation Currents

LTC2402 Datasheet(PDF) 26 Page - Linear Technology

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