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STLS2F02 Datasheet(PDF) 22 Page - STMicroelectronics |
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STLS2F02 Datasheet(HTML) 22 Page - STMicroelectronics |
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22 / 49 page ![]() DDR2 SDRAM controller interface description STLS2F02 22/49 4.2 DDR2 SDRAM read protocol As shown in Figure 8 DDR2 SDRAM read protocol, the command (CMD) includes RAS_n, CAS_n and WE_n. When a read request happens, RAS_n=1,CAS_n=0,and WE_n=1. Figure 8. DDR2 SDRAM read protocol CAS latency = 3, read latency = 3, burst length = 8 CMD READ A NOP NOP NOP NOP NOP NOP NOP NOP ≤ tDQSCK CL=3 RL=3 DOUTA1 DOUTA1 DOUTA2 DOUTA3 DOUTA4 DOUTA5 DOUTA6 DOUTA7 T0 T1 T2 T3 T4 T5 T6 T7 T8 CK/CK DQS/DQS DQS |
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