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IS25LE01G-RILA3 Datasheet(PDF) 156 Page - Integrated Silicon Solution, Inc

No. de pieza IS25LE01G-RILA3
Descripción Electrónicos  SERIAL FLASH MEMORY 133/104MHZ MULTI I/O SPI & QUAD I/O QPI DTR INTERFACE WITH ON-CHIP ECC
PDF  186 Pages
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Fabricante Electrónico  ISSI [Integrated Silicon Solution, Inc]
Página de inicio  http://www.issi.com
Logo ISSI - Integrated Silicon Solution, Inc

IS25LE01G-RILA3 Datasheet(HTML) 156 Page - Integrated Silicon Solution, Inc

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IS25LE01G
IS25WE01G
Integrated Silicon Solution, Inc.- www.issi.com
156
Rev. A6
01/14/2025
8.55 READ ASP OPERATION (RDASP, 2Bh)
The RDASP instruction code is shifted in by the rising edge of the SCK signal. Then the 16-bit ASP register contents
is shifted out, least significant byte first, most significant bit of each byte first. Each bit is shifted out at the SCK
frequency by the falling edge of the SCK signal. It is possible to read the ASP register continuously by providing
multiples of 16 bits.
Figure 8.124 Read ASP Sequence In SPI Mode
8
9
...
15
16
17
...
23
Instruction = 2Bh
CE #
SCK
SI
SO
0
1
2
3
4
5
6
7
Mode 3
Mode 0
tV
7
15
14
8
6
...
0
...
1
st byte Data Out
2
nd byte Data Out



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