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ADP5056ACCZ-R7 Datasheet(PDF) 29 Page - Analog Devices

No. de pieza ADP5056ACCZ-R7
Descripción Electrónicos  Triple Buck Regulator Integrated Power Solution
PDF  31 Pages
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Fabricante Electrónico  AD [Analog Devices]
Página de inicio  http://www.analog.com
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ADP5056ACCZ-R7 Datasheet(HTML) 29 Page - Analog Devices

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Data Sheet
ADP5056
Rev. 0 | Page 29 of 31
SELECTING THE OUTPUT CAPACITOR
The output capacitor must meet the output voltage ripple and
load transient requirements. To meet the output voltage ripple
requirement, use the following equations to calculate the ESR
and capacitance:
_
_
8
L
OUT RIPPLE
SW
OUT RIPPLE
I
C
fV
 
_
OUT RIPPLE
ESR
L
V
R
I
The calculated capacitance, COUT_RIPPLE, is 39 μF, and the calculated
RESR is 5.3 mΩ.
To meet the ±5% overshoot and undershoot requirements, use
the following equations to calculate the capacitance:

2
_
_
2
UV
STEP
OUT UV
IN
OUT
OUT UV
KI
L
C
VV
V


 

2
_
2
2
OV
STEP
OUT OV
OUT
OUT_OV
OUT
KI
L
C
VV
V


For estimation purposes, use KOV = KUV = 2. Therefore,
COUT_OV = 133 μF and COUT_UV = 15.1 μF.
The ESR of the output capacitor must be less than 5.3 mΩ, and
the output capacitance must be greater than 133 μF. It is
recommended that three ceramic capacitors be used (47 μF,
X5R, and 6.3 V), such as the GRM21BR60J476ME15 from
Murata with an ESR of 2 mΩ.
DESIGNING THE COMPENSATION NETWORK
For improved load transient and stability performance, set the
fC to fSW/10. In this example, fSW is set to 600 kHz. Therefore, fC
is set to 60 kHz.
For the 1.2 V output rail, the 47 μF ceramic output capacitor has
a derated value of 40 μF.
Choose standard components: RC = 24.9 kΩ and CC = 1 nF. CCP
is optional.
Figure 49 shows the Bode plot for the 1.2 V output rail. The cross
frequency is 58 kHz, and the phase margin is 63°.
100
1k
10k
100k
1M
FREQUENCY (Hz)
50
40
30
20
10
0
–10
–20
–30
–40
–50
200
160
–160
120
80
40
–40
–80
–120
0
–200
Figure 49. Bode Plot for 1.2 V Output
SELECTING THE INPUT CAPACITOR
For the input capacitor, select a ceramic capacitor with a minimum
value of 10 μF. Place the input capacitor near to the PVIN1 pin.
In this example, one 10 μF, X5R, 25 V ceramic capacitor is
recommended.



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