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CS4210 Datasheet(PDF) 39 Page - National Semiconductor (TI) |
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CS4210 Datasheet(HTML) 39 Page - National Semiconductor (TI) |
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39 / 102 page ![]() Revision 1.0 39 www.national.com Register Descriptions (Continued) Table 4-4. National Specific Configuration Registers Summary BAR1+Offset Width (Bits) Access Name Reset Value Reference (Page) 00h-03h 32 RW nscControl Register 00h Page 91 04h-07h 32 RSCU nscEvent Set Register xxh Page 93 08h-0Bh 32 RSCU nscEvent Clear Register xxh 0Ch-0Fh 32 RSC nscEventMask Set Register xxh Page 93 10h-13h 32 RSC nscEventMask Clear Register xxh 14h-17h 32 RU/RW nscRAMBist Register xxh Page 94 18h-1Bh 32 RW nscCmcControl Register 00h Page 94 20h-23h 32 RW/RU nscTxThreshold Register 01FE01FEh Page 94 24h-27h 32 RW nscSubSystem Register 00h Page 94 40h-43h 32 RW nscPhysReadCount Register 00h Page 95 44h-47h 32 RW nscPhysWriteCount Register 00h Page 95 48h-4Bh 32 RW nscPhysLockCount Register 00h Page 95 4Ch-5Fh -- -- Reserved 00h -- 60h-63h 32 R nscBusmgrID Register xxh Page 96 64h-67h 32 R nscBandwAvail Register xxh Page 96 68h-6Bh 32 R nscChanAvailHi Register xxh Page 96 6Ch-6Fh 32 R nscChanAvailLo Register xxh Page 96 |
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