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PDP83TG720SWCSTQ1 Datasheet(PDF) 90 Page - Texas Instruments |
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PDP83TG720SWCSTQ1 Datasheet(HTML) 90 Page - Texas Instruments |
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90 / 199 page ![]() 7.6.2.34 TDR_TC12 Register (Address = 0x30F) [reset = 0x0] TDR_TC12 is shown in Table 7-57. Return to the Summary Table. Table 7-57. TDR_TC12 Register Field Descriptions Bit Field Type Reset Description 15-14 RESERVED R 2b00 Reserved 13-8 fault_loc R 6b000000 See TC12 7-4 tdr_state R 4b0000 See TC12 3-2 RESERVED R 2b00 Reserved 1-0 tdr_activation R 2b00 See TC12 DP83TG720S-Q1 SNLS604 – SEPTEMBER 2020 www.ti.com 90 Submit Document Feedback Copyright © 2020 Texas Instruments Incorporated |
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