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HM530281R Datasheet(PDF) 10 Page - Hitachi Semiconductor

No. de pieza HM530281R
Descripción Electrónicos  331,776-word x 8-bit Frame Memory
PDF  47 Pages
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Fabricante Electrónico  HITACHI [Hitachi Semiconductor]
Página de inicio  http://www.renesas.com/eng
Logo HITACHI - Hitachi Semiconductor

HM530281R Datasheet(HTML) 10 Page - Hitachi Semiconductor

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Datasheet Title
10
WLRS (write line reset) Input (in 2 dimensional addressing mode): WLRS is an input pin for resetting
the write address pointer to the start of the line from an arbitrary dot for each line.
*3
Only the falling edge
of this signal is detected, and, on the first WCK cycle following that falling edge, the write address pointer
is set to the head of the next line when WRS is high, and to head of the current line when WRS is low.
*3
RLRS (read line reset) Input (in 2 dimensional addressing mode): RLRS is an input pin for resetting
the read address pointer to the start of the line from an arbitrary dot for each line.
*3
Only the falling edge of
this signal is detected, and, on the first RCK cycle following that falling edge, the write address pointer is
set to the head of the next line when RRS is high, and to head of the current line when RRS is low.
*3
WWND (write window scan) Input (in 2 dimensional addressing mode): WWND is an input signal
that specifies the use of the window scan function. When executing a write jump with WRS and WAS low,
if WWND is set low at the same time, a scan of the window region that takes that write jump address as its
starting point will begin (see note below).
RWND (read window scan) Input (in 2 dimensional addressing mode): RWND is an input signal that
specifies the use of the window scan function. when executing a read jump with RRS and RAS low, if
RWND is set low at the same time, a scan of the window region that takes that read jump address as its
starting point will begin.
*4
WCLR (write clear) Input: WCLR is an input signal that, independently of the levels on WRS, WAS,
WLRS and WWND resets the write address pointer to 0 and clears the window scan function. This
function is executed immediately in the WCK cycle in which WCLR was set low. This clear operation
should also be performed after applying power to the HM530281R.
RCLR (read clear) Input: RCLR is an input signal that, independently of the levels on RRS, RAS, RLRS
and RWND resets the read address pointer to 0 and clears the window scan function. This function is
executed immediately in the RCK cycle in which RCLR was set low. This clear operation should also be
performed after applying power to the HM530281R.
Notes: 1. The reset destination in window scan mode changes as follows.
Reset to 0: Reset to the window start.
Reset to line start: Reset to the point at the left edge of the window for the line
2.
Addressing Mode
Address Structure
Input Address
1 dim. add. (FIFO)
0 to 10,367 blocks
Address bits A
13 to A0
2 dim. add. (1)
32 horizontal blocks by 324 vertical lines
Line address bits V
8 to V0,
horizontal address bits H
4 to H0
2 dim. add. (2)
36 horizontal blocks by 288 vertical lines. Line address bits V
8 to V0,
horizontal address bits H
5 to H0
3. When window scan mode is set, the reset is to the point at the left edge of the window for the
line.
4. When window scan is set, the horizontal address of the pointer reset destination when
increment/hold is executed will be the left edge of the window. Also, when a reset is executed,
the pointer will be reset to the starting point of the window.
Thus it is possible to scan arbitrary window regions within the screen independently for read
and write by using these line reset and reset functions.



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