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FDMF2011 Datasheet(PDF) 10 Page - ON Semiconductor |
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FDMF2011 Datasheet(HTML) 10 Page - ON Semiconductor |
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10 / 31 page ![]() © 2016 Fairchild Semiconductor Corporation www.fairchildsemi.com FDMF2011 Rev.1.0 9 Electrical Specifications: VDD=VHB=15V, VSW=VSS=0V, VIN=50V, TJ= +25°C unless otherwise noted. Table 4. Module Electrical Specifications Symbol Parameter Condition Min. Typ. Max. Unit Supply Currents IINQ Power Stage Quiescent Current LI = HI = 0V - - 1 uA IDDQ Driver Quiescent Current LI = HI = 0V - 77 180 uA IDDO VDD operating current FSW = 20kHz - 0.3 0.6 mA FSW = 200kHz - 2.1 4.3 mA IHBQ BOOT Quiescent current LI = HI = 0V - 45 120 uA IHBO BOOT Operating current FSW = 20kHz - 0.3 0.6 mA FSW = 200kHz - 2.4 4.8 mA Under-Voltage Protection VDDR, VHBR UVLO rising threshold VDD or VHB-VPH rising threshold 8.2 9.4 10.0 V VDDF, VHBF UVLO falling threshold VDD or VHB-VPH falling Threshold 7.6 8.8 9.6 V VDDH UVLO Hysteresis VDD Hysterisis 0.6 - V tD_POR POR delay to Enable IC UVLO rising to internal PWM enable - - 10 us Control Inputs (TTL: LI, HI) VIL Low Level Input Voltage VDD = 10V to 20V 1.2 - - V VIH High Level Input Voltage - - 2.9 V VHYS Input Voltage Hysteresis - 1.0 - V RIN Input Pull-Down Resistance - 475 - kΩ PWM input (HI,LI) tLPLH LI to LO Propagation Delays LI Low HIGH to LO Low HIGH, VIH to 10% LG 100 160 300 ns tLPHL LI High Low to LO High Low, VIL to 90% LG 100 212 300 ns tHPLH HI to HO Propagation Delays HI Low HIGH to HO Low HIGH,VIH to 10% HG-PH 100 177 300 ns tHPHL HI High Low to HO High Low, VIL to 90% HG-PH 100 211 300 ns MT Delay matching, HS and LS turn-on/off - - 50 ns tPW Minimum Input Pulse Width that Changes the Output LI/HI Rising to Vth of Q1,Q2 RG=0Ω 60 ns LI/HI Falling to Vth of Q1,Q2 RG=0Ω 100 ns High-Side Driver (HDRV) (VDD = VHB = 15V) ISOURCE_HO Output Sourcing Peak current VHO=0V 250 350 - mA ISINK_HO Output Sinking Peak current VHO=15V 500 650 - mA tR_HG Rise Time GH=10% to 90%, RGH=0Ω - 170 339 ns tF_HG Fall Time GH=90% to 10%, RGH=0Ω - 70 140 ns Low-Side Driver (LDRV) (VDD = VHB = 15V) ISOURCE_LO Output Sourcing Peak current VLO=0V 250 350 - mA ISINK_LO Output Sinking Peak current VLO=15V 500 650 - mA tR_LG Rise Time GL=10% to 90%, RGL=0Ω - 171 342 ns tF_LG Fall Time GL=90% to 10%, RGL=0Ω - 71 142 ns |
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