A8519KETTR-R datasheet(17/35 Pages) ALLEGRO

17 / 35 page

Wide Input Voltage Range, High-Efficiency,

Fault-Tolerant LED Driver

A8519 and

A8519-1

Allegro MicroSystems, LLC

115 Northeast Cutoff

Worcester, Massachusetts 01615-0036 U.S.A.

1.508.853.5000; www.allegromicro.com

The APWM pin is used in conjunction with the ISET pin (see

Figure 17). This is a digital signal pin that internally adjusts the

IISET current. The typical input signal frequency is between

40 kHz and 1 MHz. The duty cycle of this signal is inversely

proportional to the percentage of current that is delivered to

the LED (see Figure 18). As an example, a system that delivers

ILED(TOTAL) = 240 mA would deliver ILED(TOTAL) = 180 mA when

an APWM signal with a duty cycle of 25% is applied. When this

pin is not used it should be tied to AGND.

Figure 17: Simplified Block Diagram of APWM ISET Block

ISET

Current

Mirror

APWM ISET

Current

Adjust Block

PWM

APWM

ISET

LED Driver

APWM Pin

High-PWM dimming ratio is acheived by regulating the output

voltage during PWM off-time. The VOUT pin samples the output

voltage during PWM on-time and regulates it during off-time. A

hysteresis control loop brings VOUT higher by approximately

350 mV (150 mV for A8519-1) whenever it drops below the

target voltage. In a highly noisy switching environment, it is

necessary to insert an RC filter at the VOUT pin. A typical value

of R = 10 kΩ and C = 47 pF is recommended.

Another important feature of the A8519 is the PWM signal to

LED current delay. This delay is typically less than 500 ns, which

allows for greater LED current accuracy at low-PWM dimming

duty cycles.

The error introduced by LED turn-on delay is partially offset by

LED turn-off delay. Therefore, a PWM pulse width of under 1

μs is still feasible, but the percentage error of LED current will

increase with narrower pulse width.

100

0102030405060708090100

APWM Duty Cycle (%)

Figure 18: Normalized LED Current vs. APWM Duty Cycle

VIN = 9 V, VOUT = ~22 V, RISET = 24 kΩ, APWM = 200 kHz

0102030405060708090100

APWM Duty Cycle (%)

Figure 19: Error in LED Current vs. APWM Duty Cycle

VIN = 9 V, VOUT = ~22 V, RISET = 24 kΩ, APWM = 200 kHz

To use the APWM pin as a trim function, the user should set

the maximum output current to a value higher than the desired

current by at least 5%. The LED IISET current is then trimmed

down to the appropriate desired value. Another consideration is

the limitation of the APWM signal’s duty cycle. In some cases, it

might be more desirable to set the maximum IISET current to be

25% to 50% higher, thus allowing the APWM signal to have duty

cycles that are between 25% and 50%.

A8519KETTR-R Datasheet(PDF) 17 Page - Allegro MicroSystems

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