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TNETV6446AINZWT Datasheet(PDF) 209 Page - Texas Instruments |
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TNETV6446AINZWT Datasheet(HTML) 209 Page - Texas Instruments |
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209 / 227 page ![]() MRCLK 2 3 1 MTCLK 2 3 1 TMS320DM6446 www.ti.com SPRS283H – DECEMBER 2005 – REVISED SEPTEMBER 2010 Table 6-92. EMAC Control Module Registers HEX ADDRESS RANGE ACRONYM REGISTER NAME 0x01C8 1004 EWCTL Interrupt control register 0x01C8 1008 EWINTTCNT Interrupt timer count Table 6-93. EMAC Control Module RAM HEX ADDRESS RANGE ACRONYM REGISTER NAME 0x01C8 2000 - 0x01C8 3FFF EMAC Control Module Descriptor Memory 6.20.2 EMAC Electrical Data/Timing Table 6-94. Timing Requirements for MRCLK (see Figure 6-68) A-513, -594, NO. UNIT -810 MIN MAX 1 tc(MRCLK) Cycle time, MRCLK 40 ns 2 tw(MRCLKH) Pulse duration, MRCLK high 14 ns 3 tw(MRCLKL) Pulse duration, MRCLK low 14 ns Figure 6-68. MRCLK Timing (EMAC - Receive) Table 6-95. Timing Requirements for MTCLK (see Figure 6-69) A-513, -594, NO. UNIT -810 MIN MAX 1 tc(MTCLK) Cycle time, MTCLK 40 ns 2 tw(MTCLKH) Pulse duration, MTCLK high 14 ns 3 tw(MTCLKL) Pulse duration, MTCLK low 14 ns Figure 6-69. MTCLK Timing (EMAC - Transmit) Copyright © 2005–2010, Texas Instruments Incorporated Peripheral and Electrical Specifications 209 Submit Documentation Feedback Product Folder Link(s): TMS320DM6446 |
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