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TNETV1644ZDU6 Datasheet(PDF) 276 Page - Texas Instruments |
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TNETV1644ZDU6 Datasheet(HTML) 276 Page - Texas Instruments |
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276 / 306 page ![]() MRCLK (Input) 1 2 MRXD3−MRXD0, MRXDV, MRXER (Inputs) 1 MTCLK (Input) MTXD3−MTXD0, MTXEN (Outputs) TMS320DM6437 Digital Media Processor SPRS345D – NOVEMBER 2006 – REVISED JUNE 2008 www.ti.com Figure 6-46. EMAC Receive Interface Timing Table 6-88. Switching Characteristics Over Recommended Operating Conditions for EMAC MII Transmit 10/100 Mbit/s(1) (see Figure 6-47) -7/-6/-5/-4 -L/-Q6/-Q5/-Q4 NO. UNIT MIN MAX 1 td(MTCLKH-MTXD) Delay time, MTCLK high to transmit selected signals valid 2 25 ns (1) Transmit selected signals include: MTXD3-MTXD0, and MTXEN. Figure 6-47. EMAC Transmit Interface Timing 276 Peripheral Information and Electrical Specifications Submit Documentation Feedback |
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