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TNETV2664FIBZWT Datasheet(PDF) 204 Page - Texas Instruments |
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TNETV2664FIBZWT Datasheet(HTML) 204 Page - Texas Instruments |
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204 / 249 page  TMS320C6424 SPRS347D – MARCH 2007 – REVISED DECEMBER 2009 www.ti.com 6.14.1.2 McASP0 Peripheral Register Description(s) Table 6-51. McASP0 Control Registers HEX ADDRESS RANGE ACRONYM REGISTER NAME 01D0 1000 PID Peripheral Identification register [Register value: 0x0010 0101] 01D0 1004 – Reserved 01D0 1008 – Reserved 01D0 100C – Reserved 01D0 1010 PFUNC Pin function register 01D0 1014 PDIR Pin direction register 01D0 1018 – Reserved 01D0 101C – Reserved 01D0 1020 – Reserved 01D0 1024 – 01D0 1040 – Reserved 01D0 1044 GBLCTL Global control register 01D0 1048 AMUTE Mute control register 01D0 104C DLBCTL Digital Loop-back control register 01D0 1050 DITCTL DIT mode control register 01D0 1054 – 01D0 105C – Reserved Alias of GBLCTL containing only Receiver Reset bits, allows transmit to be reset 01D0 1060 RGBLCTL independently from receive. 01D0 1064 RMASK Receiver format UNIT bit mask register 01D0 1068 RFMT Receive bit stream format register 01D0 106C AFSRCTL Receive frame sync control register 01D0 1070 ACLKRCTL Receive clock control register 01D0 1074 AHCLKRCTL High-frequency receive clock control register 01D0 1078 RTDM Receive TDM slot 0–31 register 01D0 107C RINTCTL Receiver interrupt control register 01D0 1080 RSTAT Status register – Receiver 01D0 1084 RSLOT Current receive TDM slot register 01D0 1088 RCLKCHK Receiver clock check control register 01D0 108C – 01D0 109C – Reserved Alias of GBLCTL containing only Transmitter Reset bits, allows transmit to be reset 01D0 10A0 XGBLCTL independently from receive. 01D0 10A4 XMASK Transmit format UNIT bit mask register 01D0 10A8 XFMT Transmit bit stream format register 01D0 10AC AFSXCTL Transmit frame sync control register 01D0 10B0 ACLKXCTL Transmit clock control register 01D0 10B4 AHCLKXCTL High-frequency Transmit clock control register 01D0 10B8 XTDM Transmit TDM slot 0–31 register 01D0 10BC XINTCTL Transmit interrupt control register 01D0 10C0 XSTAT Status register – Transmitter 01D0 10C4 XSLOT Current transmit TDM slot 01D0 10C8 XCLKCHK Transmit clock check control register 204 Peripheral Information and Electrical Specifications Copyright © 2007–2009, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): TMS320C6424 |
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