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CC1150-RTY1 Datasheet(PDF) 35 Page - Texas Instruments

No. de pieza CC1150-RTY1
Descripción Electrónicos  Low Power Sub-1 GHz RF Transmitter
PDF  67 Pages
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Fabricante Electrónico  TI1 [Texas Instruments]
Página de inicio  http://www.ti.com
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CC1150-RTY1 Datasheet(HTML) 35 Page - Texas Instruments

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CC1150
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SWRS037B – JANUARY 2006 – REVISED MARCH 2015
Table 5-10. GDO signal selection(x = 0 or 1) (continued)
GDOx_CFG[5:0]
DESCRIPTION
36 (0x24)
Reserved – defined on the transceiver version (CC1101).
37 (0x25)
Reserved – defined on the transceiver version (CC1101).
38 (0x26)
Reserved – used for test.
39 (0x27)
Reserved – defined on the transceiver version (CC1101).
40 (0x28)
Reserved – used for test.
41 (0x29)
CHIP_RDYn
42 (0x2A)
Reserved – used for test.
43 (0x2B)
XOSC_STABLE
44 (0x2C)
Reserved – used for test.
45 (0x2D)
GDO0_Z_EN_N. When this output is 0, GDO0 is configured as input (for serial TX data).
46 (0x2E)
High impedance (3-state)
47 (0x2F)
HW to 0 (HW1 achieved by setting GDOx_INV=1)
48 (0x30)
CLK_XOSC/1
49 (0x31)
CLK_XOSC/1.5
50 (0x32)
CLK_XOSC/2
51 (0x33)
CLK_XOSC/3
52 (0x34)
CLK_XOSC/4
53 (0x35)
CLK_XOSC/6
54 (0x36)
CLK_XOSC/8
55 (0x37)
CLK_XOSC/12
See (1)(2)
56 (0x38)
CLK_XOSC/16
57 (0x39)
CLK_XOSC/24
58 (0x3A)
CLK_XOSC/32
59 (0x3B)
CLK_XOSC/48
60 (0x3C)
CLK_XOSC/64
61 (0x3D)
CLK_XOSC/96
62 (0x3E)
CLK_XOSC/128
63 (0x3F)
CLK_XOSC/192
(1)
There are 2 GDO pins, but only one CLK_XOSC/n can be selected as an output at any time. If CLK_XOSC/n is to be monitored on one
of the GDO pins, the other GDO pin must be configured to values less than 0x30. The GDO0 default value is CLK_XOSC/192.
(2)
To optimize RF performance, these signals should not be used while the radio is in TX mode.
5.18 Asynchronous and Synchronous Serial Operation
Several features and modes of operation have been included in the CC1150 to provide backward
compatibility with previous TI products and other existing RF communication systems. For new systems, it
is recommended to use the built-in packet handling features, as they can give more robust
communication, significantly offload the microcontroller and simplify software development.
5.18.1 Asynchronous Serial Operation
For backward compatibility with systems already using the asynchronous data transfer from other TI
products, asynchronous transfer is also included in CC1150.
When asynchronous transfer is enabled, several of the support mechanisms for the MCU that are included
in CC1150 will be disabled, such as packet handling hardware, buffering in the FIFO and so on. The
asynchronous transfer mode does not allow the use of the data whitener, interleaver and FEC, and it is
not possible to use Manchester encoding. MSK is not supported for asynchronous transfer.
Setting PKTCTRL0.PKT_FORMAT to 3 enables asynchronous transparent (serial) mode. In TX, the
GDO0 pin is used for data input (TX data).
Copyright © 2006–2015, Texas Instruments Incorporated
Detailed Description
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