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EB413 Datasheet(PDF) 6 Page - Motorola, Inc |
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EB413 Datasheet(HTML) 6 Page - Motorola, Inc |
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6 / 12 page ![]() Engineering Bulletin EB413 6 MOTOROLA Care should be taken not to force excessive current into the MCU during this time in case a latch-up condition arises. It is likely that some external voltages could rise much faster than the MCU VDD supply, especially since care is needed in most cases to ensure that the VDD supply is a good clean and preferably noise free power source. A simple method is to place in-line resistors on port pins that could see voltage levels in excess of the rising VDD supply, and diodes to clamp the maximum difference between VDD and the port pin voltage to less than 0.6 V. A good value for the resistor is normally about 50 Ω since there is normally a maximum allowed current per pin of 20 mA and, it is assumed that the external voltage is an absolute maximum of 1 V greater than VDD in worst case circumstances. Similarly a negative voltage, below VSS (0 V in most applications) must be current limited to avoid damage to the MCU. Another phenomenon is the ability of low-power HC05 devices to be powered up by an oscillating signal attached to the port pin of the HC05, while the HC05 device is powered off. This occurs due to current being forced into the VSS and VDD supply via the inherent port protection diodes to both power supply rails within the MCU. As long as the current is limited to 20 mA total for all pins in this state, no harm will come to the MCU. However, it is important to keep the MCU in the reset condition while powered off, at least so that during power up the MCU does not drive data onto the port and draw a large current. While such current is flowing, functionality of the MCU is not guaranteed due to the possibility of substrate currents changing the state of the internal logic gates. Often the reset signal is used by other sections of the application to start up after the power-on sequence is complete and so it is possible that the reset line is distributed throughout the board. Some devices will be released from reset after different voltages on the reset signal and so it is advisable to bring this signal up to VDD within the rest delay time (normally 4064 cycles) to avoid the MCU coming out of reset before other parts of the board have done the same. This is particularly important when there are several printed circuit boards (PCBs) and multiple MCU devices talking to one another. Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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