Engineering Bulletin

EB413

4

MOTOROLA

Ideally there would be no restriction on the values of the resistors and

capacitors, but there are other considerations. Internal leakage currents

for the RESET pin are normally specified at 1

µA maximum which means

that the resistor has a maximum value of 100 k

Ω and the capacitor

should not be an electrolytic type to keep the stop current to a minimum.

Ceramic capacitors are recommended as a compromise between low

cost, low leakage, and good high-frequency response. The RESET pin

capacitance is very low (less than 5 pF).

There are also limits for the minimum resistor impedance since the

with the low-impedance voltage source of the external capacitor, it is

necessary to ensure a minimum pullup resistor value of 2 k

Ω. See

Watchdog Operation for details of the output mode of the RESET pin

where this feature is available on the device.

Low-Voltage Reset (LVR) On Chip

To protect against total or partial loss of power, some devices have an

lower than the trigger point. It is difficult to make an accurate voltage

reference with high-density complementary metal oxide semiconductor

(HCMOS) designs and so there is often a manufacturing tolerance built

into the specification. As a consequence, the minimum trigger voltage

can be sufficiently low that the device cannot run at the maximum bus

speed for reliable operation before the LVR circuit resets the device.

This restricts the maximum bus speed whenever the LVR circuit is used

to protect the device from runaway.

Significant advantages of the built-in LVR circuit are the reliability of the

integration of the LVR function and low cost. Additionally, the application

can determine the presence of a low-power reset rather than an external

reset. This can be achieved by the use of either separate vectors for the

LVR and normal reset or by means of a register containing a reset

condition status flag. This is of course not normally possible with an

external LVR circuit.

Freescale Semiconductor, Inc.

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