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Motor de Búsqueda de Datasheet de Componentes Electrónicos |
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Motor de Búsqueda de Datasheet de Componentes Electrónicos |
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UPD75P4308GS Datasheet(PDF) 30 Page - NEC |
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UPD75P4308GS Datasheet(HTML) 30 Page - NEC |
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30 / 60 page  µPD75P4308 30 8.3 Program Memory Read Procedure The µPD75P4308 can read out the program memory contents via the following steps. (1) Pull down unused pins to VSS via resistors. Set the X1 pin to low. (2) Apply +5 V to the VDD and VPP pins. (3) Wait 10 µs. (4) Zero-clear mode for program memory addresses. (5) Apply +6 V to VDD and +12.5 V to VPP. (6) Verify mode. When a clock pulse is input to the X1 pin, data is output sequentially to one address at a time based on a cycle of four pulse inputs. (7) Zero-clear mode for program memory addresses. (8) Apply +5 V to the VDD and VPP pins. (9) Power supply OFF The following diagram illustrates steps (2) to (7). VPP VDD VDD + 1 VDD VDD X1 D0/P60/KR0- D3/P63/KR3 D4/P50- D7/P53 Data output Data output MD0/P30 MD2/P32 MD3/P33 MD1/P31 “L” VPP |
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