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UM0934 Datasheet(PDF) 14 Page - STMicroelectronics

No. de pieza UM0934
Descripción Electrónicos  ST7570 S-FSK power line networking System-on-Chip
PDF  113 Pages
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Fabricante Electrónico  STMICROELECTRONICS [STMicroelectronics]
Página de inicio  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

UM0934 Datasheet(HTML) 14 Page - STMicroelectronics

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Physical layer
UM0934
14/113
Doc ID 17389 Rev 2
3
Physical layer
3.1
Overview
The ST7570 embeds a PHY layer compliant with [2], with additional functions for alarm
management and electrical delta-phase detection.
In order to meet the application’s functions and physical channel characteristics, many
parameters involved at this layer can be programmed by the user.
3.2
Frame structure
The frame at the physical level (PHY_Frame) is made up of 45 bytes (360 bits), as follows:
2 bytes - preamble (PRE) (AAAAh)
2 bytes - start subframe delimiter (SSD) (54C7h)
38 bytes - physical service data unit (P_sdu), i.e. the payload transmitted by the MAC
layer
3 bytes - pause or alarm
The bytes are sent from the most significant byte (MSB) to the least significant byte (LSB).
Bits within the byte are packed with the same order.
Figure 2.
Physical frame format
3.3
Frame timing and time-slot synchronization
The time domain in the network is divided into recurrent “time-slots”, with a fixed length
equal to the length of a physical frame PHY_Frame, (45 bytes). The start of each time-slot is
usually aligned with the mains zero-crossing and the bit time is automatically adapted to the
mains frequency and can be chosen from two values:
24 bits/mains period
48 bits/mains period.
Preamble
(PRE)
Start Subframe
Delimiter
(SSD)
P_sdu
Pause / Alarm
2 bytes
2 bytes
38 bytes
3 bytes
PHY_Frame



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