80960KA datasheet(9/43 Pages) INTEL

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80960KA

Figure 4. Multiple Register Sets Are Stored On-Chip

CACHE

ONE OF FOUR

LOCAL

LOCAL REGISTER SET

R15

1.1.7.

High Bandwidth Local Bus

The 80960KA CPU resides on a high-bandwidth

address/data bus known as the local bus (L-Bus). The

L-Bus provides a direct communication path between

the processor and the memory and I/O subsystem

interfaces. The processor uses the L-Bus to fetch

instructions, manipulate memory and respond to

interrupts. L-Bus features include:

• 32-bit multiplexed address/data path

• Four-word burst capability which allows transfers

from 1 to 16 bytes at a time

• High

bandwidth

reads

and

writes

with

66.7 MBytes/s burst (at 25 MHz)

Table 3 defines L-bus signal names and functions;

Table 4 defines other component-support signals

such as interrupt lines.

1.1.8.

Interrupt Handling

The 80960KA can be interrupted in two ways: by the

activation of one of four interrupt pins or by sending a

message on the processor’s data bus.

The 80960KA is unusual in that it automatically

handles interrupts on a priority basis and can keep

track of pending interrupts through its on-chip

interrupt controller. Two of the interrupt pins can be

configured to provide 8259A-style handshaking for

expansion beyond four interrupt lines.

1.1.9.

Debug Features

The 80960KA has built-in debug capabilities. There

are two types of breakpoints and six trace modes.

Debug features are controlled by two internal 32-bit

registers: the Process-Controls Word and the Trace-

Controls Word. By setting bits in these control words,

a software debug monitor can closely control how the

processor responds during program execution.

The 80960KA provides two hardware breakpoint

registers on-chip which, by using a special command,

can be set to any value. When the instruction pointer

matches

either

breakpoint

value,

the

breakpoint handling routine is automatically called.

The 80960KA also provides software breakpoints

through the use of two instructions: MARK and

FMARK. These can be placed at any point in a

program and cause the processor to halt execution at

that point and call the breakpoint handling routine.

The breakpoint mechanism is easy to use and

provides a powerful debugging tool.

Tracing is available for instructions (single step

execution), calls and returns and branching. Each

trace type may be enabled separately by a special

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