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MPC5646C Datasheet(PDF) 84 Page - Freescale Semiconductor, Inc |
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MPC5646C Datasheet(HTML) 84 Page - Freescale Semiconductor, Inc |
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84 / 114 page ![]() MPC5646C Microcontroller Data Sheet, Rev. 3 Preliminary—Subject to Change Without Notice Freescale Semiconductor 84 Figure 22. MII transmit signal timing diagram 4.18.3 MII Async Inputs Signal Timing (CRS and COL) Figure 23. MII async inputs timing diagram 4.18.4 MII Serial Management Channel Timing (MDIO and MDC) The FEC functions correctly with a maximum MDC frequency of 2.5 MHz. Table 46. MII Async Inputs Signal Timing1 1 Output pads configured with SRE = 0b11. Spec Characteristic Min Max Unit M9 CRS, COL minimum pulse width 1.5 — TX_CLK period Table 47. MII serial management channel timing1 Spec Characteristic Min Max Unit M10 MDC falling edge to MDIO output invalid (minimum propagation delay) 0— ns M11 MDC falling edge to MDIO output valid (max prop delay) —25 ns M12 MDIO (input) to MDC rising edge setup 28 — ns M13 MDIO (input) to MDC rising edge hold 0— ns M6 TX_CLK (input) TXD[3:0] (outputs) TX_EN TX_ER M5 M7 M8 CRS, COL M9 |
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