PIC16F720-ESLASHML datasheet(159/244 Pages) MICROCHIP

159 / 244 page

 2010 Microchip Technology Inc.

DS41430A-page 159

PIC16F/LF720/721

SSPSTAT: SYNCHRONOUS SERIAL PORT STATUS REGISTER (I2C MODE)

R/W-0

R-0

SMP

CKE

D/A

R/W

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 7

SMP: SPI Data Input Sample Phase bit

= Slew Rate Control (limiting) disabled. Operating in I2C Standard mode (100 kHz and 1 MHz).

= Slew Rate Control (limiting) enabled. Operating in I2C Fast mode (400 kHz).

bit 6

CKE: SPI Clock Edge Select bit

This bit must be maintained clear. Used in SPI mode only.

bit 5

D/A: DATA/ADDRESS bit (I2C mode only)

= Indicates that the last byte received or transmitted was data

= Indicates that the last byte received or transmitted was address

bit 4

P: Stop bit

This bit is cleared when the SSP module is disabled, or when the Start bit is detected last.

= Indicates that a Stop bit has been detected last (this bit is ‘0’ on Reset)

= Stop bit was not detected last

bit 3

S: Start bit

This bit is cleared when the SSP module is disabled, or when the Stop bit is detected last.

= Indicates that a Start bit has been detected last (this bit is ‘0’ on Reset)

= Start bit was not detected last

bit 2

R/W: READ/WRITE bit Information

This bit holds the R/W bit information following the last address match. This bit is only valid from the

address match to the next Start bit, Stop bit or ACK bit.

= Read

= Write

bit 1

UA: Update Address bit (10-bit I2C mode only)

= Indicates that the user needs to update the address in the SSPADD register

= Address does not need to be updated

bit 0

BF: Buffer Full Status bit

Receive:

= Receive complete, SSPBUF is full

= Receive not complete, SSPBUF is empty

Transmit:

= Transmit in progress, SSPBUF is full

= Transmit complete, SSPBUF is empty

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