PIC16F720-ESLASHML datasheet(157/244 Pages) MICROCHIP

No. de pieza	PIC16F720-E/ML

Descripción Electrónicos	20-Pin Flash Microcontrollers with nanoWatt XLP Technology

PDF	244 Pages

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Fabricante Electrónico	MICROCHIP [Microchip Technology]

Página de inicio	http://www.microchip.com

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 2010 Microchip Technology Inc.

DS41430A-page 157

PIC16F/LF720/721

17.2.10

CLOCK SYNCHRONIZATION

When the CKP bit is cleared, the SCL output is held low

once it is sampled low. Therefore, the CKP bit will not

stretch the SCL line until an external I2C master device

has already asserted the SCL line low. The SCL output

will remain low until the CKP bit is set and all other

devices on the I2C bus have released SCL. This

ensures that a write to the CKP bit will not violate the

minimum high time requirement for SCL (Figure 17-14).

17.2.11

SLEEP OPERATION

While in Sleep mode, the I2C module can receive

addresses of data, and when an address match or

complete byte transfer occurs, wake the processor

from Sleep (if SSP interrupt is enabled).

FIGURE 17-14:

CLOCK SYNCHRONIZATION TIMING

SDA

SCL

DX-1

Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4

SSPCON

CKP

Master device

deasserts clock

Master device

asserts clock

PIC16F720-E/ML Datasheet(PDF) 157 Page - Microchip Technology