www.austriamicrosystems.com

Revision 1.18

18 - 26

AS1109

Data Sheet - A p p l i c a t i o n I n f o r m a t i o n

Low-current diagnosis mode is started with 3 clock pulses during error detection mode. After the three pulses of CLK,

a pulse of LD loads the internal all 1s test pattern. Then OEN should be enabled for 2µs for testing. With the rising

edge of OEN the test of the LEDs is stopped and while LD is high the desired error mode can be selected with the cor-

responding clock pulses.

With the next data input the detailed error code will be clocked out at SDO.

Note: See Figure 22 for the use of an external test pattern.

Figure 22. Low-Current Diagnosis Mode with External Test Pattern – 128 Cascaded AS1109s

Cascading Devices

To cascade multiple AS1109 devices, pin SDO must be connected to pin SDI of the next AS1109 (see Figure 23). At

each rising edge of CLK the LSB of the shift register will be written into the shift register SDI of the next AS1109 in the

chain. Data at the SDI pin is clocked in at the rising edge of the CLK pulse and is clocked out at the SDO pin 8.5 clock

cycles later at the falling edge of the CLK pulse.

Note: When n*AS1109 devices are in one chain, n*8 clock pulses are needed to latch-in the input data.

Figure 23. Cascading AS1109 Devices

Temperature Error Code

Data2

Data1

GEF

GEF

T/O or S Error Code

Data0

Rising Edge of OEN

Acquisition of Error Status

Display

SDI

SDO

CLK

OEN

LD

1024x

1024x

3x Clocks

Low-Current

Mode

Clock for Error

Mode 1x/2x

Falling Edge of LD; Error Register

is copied into Shift Register

O or S Error Code

from Test Pattern

1024x

GEF = Global Error Flag

2µs Low-Current Diagnosis Mode

≤ 100mA

≤ 100mA

Current

≤ 0.8mA

Data2

Data3

External all 1s Test Pattern

AS1109 #n-1

SDI

SDO

CLK

LD

OEN

SDI

CLK

LD

OEN

AS1109 #1

SDI

SDO

CLK

LD

OEN

AS1109 #2

SDI

SDO

CLK

LD

OEN