AD9992BBCZ datasheet(73/92 Pages) AD

73 / 92 page

AD9992

Rev. C | Page 73 of 92

LAYOUT OF INTERNAL REGISTERS

The AD9992 address space is divided into two register areas, as

illustrated in Figure 85. In the first address space, Address 0x00

to Address 0xFF contain the registers for the AFE, miscellaneous,

VD/HD, I/O and CP, timing core, shutter and GPO, mode, and

update control functions. The second address space, beginning

at Address 0x800, consists of the V-pattern groups, V-sequences,

and field registers. This is a configurable set of registers; the user

can decide how many V-pattern groups, V-sequences, and fields

are used in a particular design. Therefore, the addresses for

these registers vary, depending on the number of V-patterns

and V-sequences chosen.

Address 0x28 specifies the total number of V-pattern groups

and V-sequences used. The starting address for the V-pattern

groups is always 0x800. The starting address for the V-sequences

is based on the number of V-pattern groups used, with each

V-pattern group occupying 48 register addresses. The starting

address for the field registers depends on both the number of

V-pattern groups and the number of V-sequences. Each V-

sequence occupies 40 register addresses, and each field occupies

16 register addresses.

The starting address for the V-sequences is equal to 0x800 plus

the number of V-pattern groups times 48. The starting address

for the fields is equal to the starting address of the V-sequences

plus the number of V-sequences times 40. The V-pattern,

V-sequence and field registers must always occupy a continuous

block of addresses.

Figure 86 shows an example in which three V-pattern groups,

four V-sequences, and two fields are used. The starting address

for the V-pattern groups is always 0x800. Because VPATNUM = 3,

the V-pattern groups occupies 144 address locations. The start of

the V-sequence registers is 0x890 (that is, 0x800 + 144). With

VSEQNUM = 4, the V-sequences occupy 160 address locations.

Therefore, the field registers begin at 0x930 (that is, 0x890 + 160).

The AD9992 address space contains many unused addresses.

Undefined addresses between Address 0x00 and Address 0xFF

should not be written to; otherwise, the AD9992 may operate

incorrectly. Continuous register writes should be performed

carefully so that undefined registers are not written to.

FIXED REGISTER AREA

ADDR 0x00

V-PATTERN GROUPS

V-SEQUENCES

CONFIGURABLE REGISTER AREA

VPAT START 0x800

FIELDS

MAX 0xFFF

VSEQ START

FIELD START

ADDR 0xFF

AFE REGISTERS

UPDATE CONTROL REGISTERS

MISCELLANEOUS REGISTERS

VD/HD REGISTERS

I/O AND CP REGISTERS

TEST REGISTERS

TIMING CORE REGISTERS

MODE REGISTERS

TEST REGISTERS

SHUTTER AND GPO REGISTERS

INVALID DO NOT ACCESS

Figure 85. Layout of AD9992 Registers

ADDR 0x800

ADDR 0x890

ADDR 0x930

ADDR 0x950

MAX 0xFFF

3 V-PATTERN GROUPS

(48 × 3 = 144 REGISTERS)

4 V-SEQUENCES

(40 × 4 = 160 REGISTERS)

2 FIELDS

(16 × 2 = 32 REGISTERS)

UNUSED MEMORY

Figure 86. Example Register Configuration

AD9992BBCZ Datasheet(PDF) 73 Page - Analog Devices

AD9992BBCZ Datasheet(HTML) 73 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92

Datasheet Descarga

Enlace URL