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CS5378 Datasheet(PDF) 40 Page - Cirrus Logic |
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CS5378 Datasheet(HTML) 40 Page - Cirrus Logic |
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40 / 88 page ![]() CS5378 DS639F2 40 12. SINC FILTER The SINC filter primary purpose is to attenuate out- of-band noise components from the ∆Σ modula- tors. While doing so, they decimate 1-bit ∆Σ data into lower frequency 24-bit data suitable for the FIR and IIR filters. The SINC filter has three cascaded sections, SINC1, SINC2, and SINC3, which are each made up of the smaller stages shown in Figure 23. The selected output word rate in the FILTCFG reg- ister automatically determines the coefficients and decimation ratios selected for the SINC filters. 12.1 SINC1 Filter The first section is SINC1, a single stage 5th order fixed decimate by 8 SINC filter. This SINC filter decimates the incoming 1-bit ∆Σ bit stream from the modulators down to a 64 kHz rate. 12.2 SINC2 Filter The second section is SINC2, a multi-stage, vari- able order, variable decimation SINC filter. De- pending on the selected output word rate in the FILTCFG register, different cascaded SINC2 stag- es are enabled, as shown in Table 11. 12.3 SINC3 Filter The last section is SINC3, a flexible multi-stage variable order, variable decimation SINC filter. Depending on the selected output word rate in the FILTCFG register, different SINC3 stages are en- abled, as shown in Table 11. 12.4 SINC Filter Synchronization The SINC filter is synchronized to the external sys- tem by the MSYNC signal, which is generated from the SYNC input. The MSYNC signal sets a reference time (time 0) for all filter operations, and the SINC filter is restarted to phase align with this reference time. sinc1 8 5th order 4th order Figure 23. SINC Filter Block Diagram 1-bit 24-bit ∆−Σ 2 stage1 sinc2 4th order 2 stage2 sinc2 5th order 2 stage3 sinc2 6th order 2 stage4 sinc2 4th order 5 stage1 sinc3 4th order 5 stage2 sinc3 4th order 5 stage3 sinc3 5th order 2 stage5 sinc3 6th order 3 stage6 sinc3 6th order 2 stage7 sinc3 Output Input 5th order 5 stage4 sinc3 |
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