T89C51CC02CA-RATIM datasheet(73/145 Pages) ATMEL

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T89C51CC02

4126D–CAN–05/03

To enable an interrupt on Buffer-full condition:

•

Enable General CAN IT in the interrupt system register

•

Enable interrupt on Buffer full, ENBUF

To enable an interrupt when Timer overruns:

•

Enable Overrun IT in the interrupt system register

When an interrupt occurs, the corresponding message object bit is set in the SIT

To acknowledge an interrupt, the corresponding CANSTCH bits (RXOK, TXOK,...) or

CANGIT bits (OVRTIM, OVRBUF,...), must be cleared by the software application.

When the CAN node is in transmission and detects a Form Error in its frame, a bit Error

will also be raised. Consequently, two consecutive interrupts can occur, both due to the

same error.

When a message object error occurs and is set in CANSTCH register, no general error

are set in CANGIE register.

bit Timing and Baud Rate

Figure 36. Sample and Transmission Point

The baud rate selection is made by Tbit calculation:

Tbit = Tsyns + Tprs + Tphs1 + Tphs2

Tsyns = Tscl = (BRP[5..0]+ 1)/Fcan = 1TQ

Tprs = (1 to 8) * Tscl = (PRS[2..0]+ 1) * Tscl

Tphs1 = (1 to 8) * Tscl = (PHS1[2..0]+ 1) * Tscl

Tphs2 = (1 to 8) * Tscl = (PHS2[2..0]+ 1) * Tscl

Tsjw = (1 to 4) * Tscl = (SJW[1..0]+ 1) * Tscl

The total number of Tscl (Time Quanta) in a bit time must be comprised between 8 to

25.

FCAN

CLOCK

Prescaler BRP

PRS 3bit length

PHS1 3bit length

PHS2 3bit length

SJW 2-bit length

bit Timing

System Clock Tscl

Time Quantum

Sample Point

Transmission Point

T89C51CC02CA-RATIM Datasheet(PDF) 73 Page - ATMEL Corporation