LS1012A datasheet(5/39 Pages) NXP

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Chapter 1

Overview

1.1 Introduction

The Layerscape LS1012A Freeway (FRWY-LS1012A) board is an ultra-low-cost

development platform for LS1012A. The board provides connectivity support for SPI,

UART, and I2C based mikroBUS™ connector. Also, the FRWY-LS1012A supports 512

MB of DDR3L memory, two 1 Gbit/s Ethernet ports, one USB 3.0 port, Audio in/out and

mic interface, and PCIe Gen1/2 M.2 Type E modules.

The dimensions of the board are 83x90 mm. (Figure 1-4). The system is lead-free and

RoHS-compliant.

The LS1012A processor is built on the LS architecture combining one Arm® A53

processor core with the data path acceleration and network, peripheral interfaces required

for networking, wireless infrastructure, and the general-purpose embedded applications.

The FRWY-LS1012A onboard resources and debugging devices allow you to:

• Upload and run code.

• Use the FRWY-LS1012A as a demonstration tool.

FRWY-LS1012A comes loaded with Layerscape SDK, which is the next generation of

Linux enablement software for Layerscape family of processors. It provides all the

necessary drivers, tools and libraries required to enable all features of the Arm® based

Layerscape processors.

1.2 Related documentation

Table 1-1 lists the additional documents that you can refer to, for more information about

the FRWY-LS1012A.

Layerscape LS1012A Freeway (FRWY-LS1012A) Board Reference Manual, Rev. 0, 04/2018

NXP Semiconductors

LS1012A Datasheet(PDF) 5 Page - NXP Semiconductors