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LS1012A Datasheet(PDF) 24 Page - NXP Semiconductors |
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LS1012A Datasheet(HTML) 24 Page - NXP Semiconductors |
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24 / 39 page ![]() 2.8 M.2 Type-E NGFF slot The FRWY-LS1012A supports 1 M.2 Type-E NGFF slot connected to LS1012A through the SerDes lane D. The onboard M.2 NGFF onnector supports only 1630, 2230 M2 Type E cards. 0.1uF REFCLK- REFCLK+ LS1012A 3V3 3V3 PERST# 4.7K M.2 Connector 4.7K 3.3V TX_P RX_P PETn0 PERp0 Voltage Translator 1.8V 3.3V DUT_PORST_B PETp0 0.1uF TX_N RX_N PERn0 WAKE# 3V3 3V3 Only for WiFi (M.2 Type E) Supports 1630 and 2230 modules Voltage Translator 1.8V 3.3V IIC1_SCL IIC1_SDA I2C_CLK I2C_DATA 3V3 3V3 3V3 3V3 PCIe Gen Clock Buffer 2-OUT Si52112-B3 25 MHZ 100 Mhz 100 Mhz SD1_REF_CLK1_N SD1_REF_CLK1_P Figure 2-7. NGFF slot 2.9 Audio interface The FRWY-LS1012A board supports 3.5mm jack for audio and mic interface using the SGTL5000 codec. This codec connects with LS1012A on the SAI2 interface. SAI2 supports full duplex audio and takes bit clock (TX and RX BCLK) and frame clock (TX and RX SYNC) as input from SGTL5000. The SGTL5000 generates these clocks based on a 25 MHz MCLK, which is fed from the 25 MHz crystal clock. The SGTL5000 control interface is I2C-based and can be accessed at the 0x0A address. M.2 Type-E NGFF slot Layerscape LS1012A Freeway (FRWY-LS1012A) Board Reference Manual, Rev. 0, 04/2018 24 NXP Semiconductors |
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