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STM32F103X6 Datasheet(PDF) 67 Page - STMicroelectronics

No. de pieza STM32F103X6
Descripción Electrónicos  Performance line, ARM-based 32-bit MCU with Flash, USB, CAN, seven 16-bit timers, two ADCs and nine communication interfaces
PDF  84 Pages
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Fabricante Electrónico  STMICROELECTRONICS [STMicroelectronics]
Página de inicio  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32F103X6 Datasheet(HTML) 67 Page - STMicroelectronics

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STM32F103xx
Electrical characteristics
67/84
Figure 30.
Typical connection diagram using the ADC
1.
Refer to Table 44 for the values of CAIN, RAIN, RADC and CADC.
2.
CPARASITIC must be added to CAIN. It represents the capacitance of the PCB (dependent on soldering and
PCB layout quality) plus the pad capacitance (3 pF). A high CPARASITIC value will downgrade conversion
accuracy. To remedy this, fADC should be reduced.
General PCB design guidelines
Power supply decoupling should be performed as shown in Figure 31 or Figure 32,
depending on whether VREF+ is connected to VDDA or not. The 10 nF capacitors should be
ceramic (good quality). They should be placed them as close as possible to the chip.
Figure 31.
Power supply and reference decoupling (VREF+ not connected to VDDA)
1.
VREF+ and VREF– inputs are available only on 100-pin packages.
ai14150b
STM32F103xx
VDD
AINx
IL±1 µA
0.6 V
VT
RAIN(1)
CAIN
VAIN
0.6 V
VT
RADC(1)
12-bit A/D
conversion
CADC(1)
VREF+
(see note 1)
STM32F103xx
VDDA
VSSA /VREF–
(see note 1)
1 µF // 10 nF
1 µF // 10 nF
ai14388b



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