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M25P05-AVMP6TP Datasheet(PDF) 41 Page - Numonyx B.V |
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M25P05-AVMP6TP Datasheet(HTML) 41 Page - Numonyx B.V |
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41 / 52 page ![]() M25P05-A DC and AC parameters 41/52 Table 16. AC characteristics (40 MHz operation) 40 MHz available for products marked since week 20 of 2004, only(1) Test conditions specified in Table 10. and Table 11. 1. Only applicable as a constraint for a WRSR instruction when SRWD is set to ‘1’. Symbol Alt. Parameter Min Typ Max Unit fC fC Clock frequency for the following instructions: FAST_READ, PP, SE, BE, DP, RES, WREN, WRDI, RDSR, WRSR D.C. 40 MHz fR Clock frequency for read instructions D.C. 20 MHz tCH (2) 2. tCH + tCL must be greater than or equal to 1/ fC. tCLH Clock high time 11 ns tCL (2) tCLL Clock low time 11 ns tCLCH (3) 3. Value guaranteed by characterization, not 100% tested in production. Clock rise time(4) (peak to peak) 4. Expressed as a slew-rate. 0.1 V/ns tCHCL (3) Clock fall time(4) (peak to peak) 0.1 V/ns tSLCH tCSS S active setup time (relative to C) 5 ns tCHSL S not active hold time (relative to C) 5 ns tDVCH tDSU Data in setup time 2 ns tCHDX tDH Data in hold time 5 ns tCHSH S active hold time (relative to C) 5 ns tSHCH S not active setup time (relative to C) 5 ns tSHSL tCSH S deselect time 100 ns tSHQZ (3) tDIS Output disable time 9 ns tCLQV tV Clock Low to Output Valid 9 ns tCLQX tHO Output hold time 0 ns tHLCH HOLD setup time (relative to C) 5 ns tCHHH HOLD hold time (relative to C) 5 ns tHHCH HOLD setup time (relative to C) 5 ns tCHHL HOLD hold time (relative to C) 5 ns tHHQX (3) tLZ HOLD to Output Low-Z 9 ns tHLQZ (3) tHZ HOLD to Output High-Z 9 ns tWHSL (5) 5. Details of how to find the date of marking are given in application note, AN1995. Write protect setup time 20 ns tSHWL (1) Write protect hold time 100 ns tDP (3) S High to deep power-down mode 3 µs tRES1 (3) S High to standby mode without electronic signature read 3µs tRES2 (3) S High to standby mode with electronic signature read 1.8 µs |
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