M25P05-AVMP6T datasheet(10/34 Pages) STMICROELECTRONICS

No. de pieza	M25P05-AVMP6T

Descripción Electrónicos	512 Kbit, Low Voltage, Serial Flash Memory With 25 MHz SPI Bus Interface

PDF	34 Pages

Scroll/Zoom	100%

Fabricante Electrónico	STMICROELECTRONICS [STMicroelectronics]

Página de inicio	http://www.st.com

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M25P05-A

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Figure 8. Write Enable (WREN) Instruction Sequence

Write Enable (WREN)

The Write Enable (WREN) instruction (Figure 8)

sets the Write Enable Latch (WEL) bit.

The Write Enable Latch (WEL) bit must be set pri-

or to every Page Program (PP), Sector Erase

(SE), Bulk Erase (BE) and Write Status Register

(WRSR) instruction.

The Write Enable (WREN) instruction is entered

by driving Chip Select (S) Low, sending the in-

struction code, and then driving Chip Select (S)

High.

Figure 9. Write Disable (WRDI) Instruction Sequence

Write Disable (WRDI)

The Write Disable (WRDI) instruction (Figure 9)

resets the Write Enable Latch (WEL) bit.

The Write Disable (WRDI) instruction is entered by

driving Chip Select (S) Low, sending the instruc-

tion code, and then driving Chip Select (S) High.

The Write Enable Latch (WEL) bit is reset under

the following conditions:

– Power-up

– Write Disable (WRDI) instruction completion

– Write Status Register (WRSR) instruction com-

pletion

– Page Program (PP) instruction completion

– Sector Erase (SE) instruction completion

– Bulk Erase (BE) instruction completion

AI02281E

34567

High Impedance

Instruction

AI03750D

34567

High Impedance

Instruction

M25P05-AVMP6T Datasheet(PDF) 10 Page - STMicroelectronics