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LAN8808D/KDX Datasheet(PDF) 71 Page - Microchip Technology

No. de pieza LAN8808D/KDX
Descripción Electrónicos  4-Port Gigabit Ethernet Transceiver with QSGMII Support
PDF  80 Pages
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Fabricante Electrónico  MICROCHIP [Microchip Technology]
Página de inicio  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

LAN8808D/KDX Datasheet(HTML) 71 Page - Microchip Technology

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LAN8808D
© 2026 Microchip Technology Inc. and its subsidiaries
DS00005833C-page 71
6.6.9
CK125_REF_INP/M TIMING
This section specifies the CK125_REF_INP/M reference clock timing of the device.
• Duty Cycle: (40% minimum, 50% typical, 60% maximum)
• Jitter: < 100 ps rms
• Frequency: 125 MHz ± 50 ppm
6.7
Clock Circuit
If REF_CLK_SEL1=0, XI must be driven with a nominal 25 MHz single-ended clock signal meeting the following spec-
ifications:
• Duty Cycle: (40% minimum, 50% typical, 60% maximum)
• Jitter: <100 ps rms
• Frequency: 25 MHz ± 50 ppm
Note:
A 125 MHz differential clock reference is recommended for best QSGMII performance. Refer to the
CK125_REF_INP/CK125_REF_INM pin definitions in Table 3-4 and the LVDS1 buffer characteristics in
Table 6-5 for additional information.



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