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IS25LE01G-RILA3 Datasheet(PDF) 174 Page - Integrated Silicon Solution, Inc

No. de pieza IS25LE01G-RILA3
Descripción Electrónicos  SERIAL FLASH MEMORY 133/104MHZ MULTI I/O SPI & QUAD I/O QPI DTR INTERFACE WITH ON-CHIP ECC
PDF  186 Pages
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Fabricante Electrónico  ISSI [Integrated Silicon Solution, Inc]
Página de inicio  http://www.issi.com
Logo ISSI - Integrated Silicon Solution, Inc

IS25LE01G-RILA3 Datasheet(HTML) 174 Page - Integrated Silicon Solution, Inc

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IS25LE01G
IS25WE01G
Integrated Silicon Solution, Inc.- www.issi.com
174
Rev. A6
01/14/2025
8.71 CLEAR ECC REGISTER OPERATION (CLECC, B6h)
A Clear ECC Register (CLECC) instruction clears ECCEVENT, ECCCOUNTER, and IPA_ECC bits [6:1] in the
ECC
Register to “0”. Once any bits are set to “1”, they remain set to “1” until they are cleared to “0” with a CLECC
command.
Figure 8.154 Clear ECC Register Sequence In SPI Mode
Instruction = B6h
CE#
SCK
SI
0
1
2
3
4
5
6
7
Mode 3
Mode 0
SO
High Impedance
Figure 8.155 Clear ECC Register Sequence In QPI Mode
B6h
CE#
SCK
IO[3:0]
0
1
Mode 3
Mode 0



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