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LSF0102 Datasheet(PDF) 18 Page - Texas Instruments |
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LSF0102 Datasheet(HTML) 18 Page - Texas Instruments |
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18 / 42 page ![]() 8.2.4 Voltage Translation for Vref_B < Vref_A + 0.8V As described in the Enable, Disable, and Reference Voltage Guidelines section, it is generally recommended that Vref_B > Vref_A + 0.8V; however, the device can still operate in the condition where Vref_B < Vref_A + 0.8V as long as additional considerations are made for the design. Typical Operation (Vref_B > Vref_A + 0.8V): in this scenario, pullup resistors are not required on the A-side for proper down-translation. When down translating from B to A, the A-side I/O ports will clamp at Vref_A to provide proper voltage translation. For further explanation of device operation, see the Down Translation with the LSF Family video. Requirements for Vref_B < Vref_A + 0.8V Operation: in this scenario, there is not a large enough voltage difference between Vref_A and Vref_B to ensure that the A side I/O ports will be clamped at Vref_A, but rather at a voltage approximately equal to Vref_B – 0.8V. For example, if Vref_B = 1.8V and Vref_A = 1.2V, the A-side I/Os will clamp to a voltage around 1.0V. Therefore, to operate in such a condition, the following additional design considerations must be met: • Vref_B must be greater than VRef_A during operation (Vref_B > Vref_A) • Pullup resistors should be populated on A-side I/O ports for the line to be fully pulled up to the desired voltage. Figure 8-6 shows an example of this setup, where 1.2V ↔ 1.8V translation is achieved with the LSF0102. This type of setup also applies for other voltage nodes such as 1.8V ↔ 2.5V, 1.05V ↔ 1.5V, and others as long as the Recommended Operating Conditions table is followed. 1.8 V SW SW 1.8 V Device 1.2 V Device 200 kΩ Vref_B RPU(B1) Vref_A 1.2 V RPU(B2) EN B1 B2 A2 A1 RPU(A2) RPU(A1) 0.1 μF Figure 8-6. 1.2V to 1.8V Level Translation with LSF010x 8.3 Power Supply Recommendations There are no power sequence requirements for the LSF family. Table 8-4 provides recommended operating voltages for all supply and input pins. Table 8-4. Recommended Operating Voltages PARAMETER MIN TYP MAX UNIT Vref_A (1) reference voltage (A) 0.9 5.5 V Vref_B reference voltage (B) Vref_A + 0.8 5.5 V VI(EN) input voltage on EN pin Vref_A + 0.8 5.5 V VPU pull-up supply voltage 0 Vref_B V (1) Vref_A is required to be the lowest voltage level across all inputs and outputs. LSF0102 SDLS972B – APRIL 2023 – REVISED APRIL 2024 www.ti.com 18 Submit Document Feedback Copyright © 2024 Texas Instruments Incorporated Product Folder Links: LSF0102 |
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