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MPC8323ECVRADDC Datasheet(PDF) 76 Page - Freescale Semiconductor, Inc |
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MPC8323ECVRADDC Datasheet(HTML) 76 Page - Freescale Semiconductor, Inc |
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76 / 80 page ![]() MPC8323E PowerQUICC™ II Pro Integrated Communications Processor Family Hardware Specifications, Rev. 0 76 Freescale Semiconductor System Design Information output impedance is the average of two components, the resistances of the pull-up and pull-down devices. When data is held high, SW1 is closed (SW2 is open) and RP is trimmed until the voltage at the pad equals OVDD/2. RP then becomes the resistance of the pull-up devices. RP and RN are designed to be close to each other in value. Then, Z0 = (RP + RN)/2. Figure 45. Driver Impedance Measurement The value of this resistance and the strength of the driver’s current source can be found by making two measurements. First, the output voltage is measured while driving logic 1 without an external differential termination resistor. The measured voltage is V1 = Rsource × Isource. Second, the output voltage is measured while driving logic 1 with an external precision differential termination resistor of value Rterm. The measured voltage is V2 =(1/(1/R1 +1/R2)) × Isource. Solving for the output impedance gives Rsource = Rterm × (V1/V2 – 1). The drive current is then Isource =V1/Rsource. Table 65 summarizes the signal impedance targets. The driver impedance are targeted at minimum VDD, nominal OVDD, 105°C. Table 65. Impedance Characteristics Impedance Local Bus, Ethernet, DUART, Control, Configuration, Power Management PCI DDR DRAM Symbol Unit RN 42 Target 25 Target 20 Target Z0 W RP 42 Target 25 Target 20 Target Z0 W Differential NA NA NA ZDIFF W Note: Nominal supply voltages. See Table 1, Tj = 105°C. OVDD OGND RP RN Pad Data SW1 SW2 |
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