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MPC8323ECVRADDC Datasheet(PDF) 25 Page - Freescale Semiconductor, Inc |
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MPC8323ECVRADDC Datasheet(HTML) 25 Page - Freescale Semiconductor, Inc |
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25 / 80 page  MPC8323E PowerQUICC™ II Pro Integrated Communications Processor Family Hardware Specifications, Rev. 0 Freescale Semiconductor 25 Local Bus Figure 13 shows the MII management AC timing diagram. Figure 13. MII Management Interface Timing Diagram 9 Local Bus This section describes the DC and AC electrical specifications for the local bus interface of the MPC8323E. 9.1 Local Bus DC Electrical Characteristics Table 29 provides the DC electrical characteristics for the local bus interface. 9.2 Local Bus AC Electrical Specifications Table 30 describes the general timing parameters of the local bus interface of the MPC8323E. Table 29. Local Bus DC Electrical Characteristics Parameter Symbol Min Max Unit High-level input voltage VIH 2OVDD + 0.3 V Low-level input voltage VIL –0.3 0.8 V High-level output voltage, IOH = –100 μAVOH OVDD – 0.2 — V Low-level output voltage, IOL = 100 μAVOL —0.2 V Input current IIN —±5 μA Table 30. Local Bus General Timing Parameters Parameter Symbol1 Min Max Unit Notes Local bus cycle time tLBK 15 — ns 2 Input setup to local bus clock tLBIVKH 7— ns 3, 4 Input hold from local bus clock tLBIXKH 1.0 — ns 3, 4 LALE output fall to LAD output transition (LATCH hold time) tLBOTOT1 1.5 — ns 5 MDC tMDDXKH tMDC tMDCH tMDCR tMDCF tMDDVKH tMDKHDX MDIO MDIO (Input) (Output) |
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