AT83SND2CMP3 datasheet(75/97 Pages) ATMEL

No. de pieza	AT83SND2CMP3

Descripción Electrónicos	Single-Chip MP3 Decoder with Full Audio Interface

PDF	97 Pages

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Fabricante Electrónico	ATMEL [ATMEL Corporation]

Página de inicio	http://www.atmel.com

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75 / 97 page

AT83SND2CMP3

7524B–MP3–05/06

Interrupt

The Serial I/O Port handles 2 interrupt sources that are the “end of reception” (RI in

SCON) and “end of transmission” (TI in SCON) flags. As shown in Figure 72 these flags

are combined together to appear as a single interrupt source for the C51 core. Flags

must be cleared by software when executing the serial interrupt service routine.

The serial interrupt is enabled by setting ES bit in IEN0 register. This assumes interrupts

are globally enabled by setting EA bit in IEN0 register.

Depending on the selected mode and weather the framing error detection is enabled or

disabled, RI flag is set during the stop bit or during the ninth bit as detailed in Figure 73.

Figure 72. Serial I/O Interrupt System

Figure 73. Interrupt Waveforms

IEN0.4

Serial I/O

Interrupt Request

SCON.1

SCON.0

RXD

D1D2D3D4D5D6D7

Start Bit

8-bit Data

Stop Bit

SMOD0 = X

SMOD0 = 1

a. Mode 1

b. Mode 2 and 3

RXD

D1D2D3D4D5D6

Start bit

9-bit data

Stop bit

SMOD0 = 1

SMOD0 = 0

AT83SND2CMP3 Datasheet(PDF) 75 Page - ATMEL Corporation