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Motor de Búsqueda de Datasheet de Componentes Electrónicos |
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MCP3910 Datasheet(PDF) 76 Page - Microchip Technology |
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MCP3910 Datasheet(HTML) 76 Page - Microchip Technology |
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76 / 90 page  MCP3910 DS20005116D-page 76 2012-2020 Microchip Technology Inc. 9.8 OFFCAL_CHn and GAINCAL_CHn Registers – Digital Offset and Gain Error Calibration Registers Name Bits Address Cof OFFCAL_CH0 24 0x0F R/W GAINCAL_CH0 24 0x10 R/W OFFCAL_CH1 24 0x11 R/W GAINCAL_CH1 24 0x12 R/W REGISTER 9-8: OFFCAL_CHn: DIGITAL OFFSET CALIBRATION REGISTER R/W-0 R/W-0 R/W-0 ... R/W-0 R/W-0 R/W-0 R/W-0 OFFCAL_CHn[23:21] ... OFFCAL_CHn[3:0] bit 23 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown bit 23-0 OFFCAL_CHn[23:0]: Digital Offset Calibration Value for Corresponding Channel CHn bits This register is simply added to the output code of the channel, bit-by-bit. This register is a 24-bit two’s complement MSB first coding. CHn Output Code = OFFCAL_CHn + ADC CHn Output Code. This register is a Don’t Care if EN_OFFCAL = 0 (offset calibration disabled), but its value is not cleared by the EN_OFFCAL bit. REGISTER 9-9: GAINCAL_CHn: GAIN ERROR CALIBRATION REGISTER R/W-0 R/W-0 R/W-0 ... R/W-0 R/W-0 R/W-0 R/W-0 GAINCAL_CHn[23:21] ... GAINCAL_CHn[3:0] bit 23 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown bit 23-0 GAINCAL_CHn: Digital Gain Error Calibration Value for Corresponding Channel CHn bits This register is a 24-bit signed MSB first coding with a range of -1x to +0.9999999x (from 0x80000 to 0x7FFFFF). The gain calibration adds 1x to this register and multiplies it to the output code of the channel, bit-by-bit, after offset calibration. The range of the gain calibration is thus from 0x to 1.9999999x (from 0x80000 to 0x7FFFFF). The LSB corresponds to a 2-23 increment in the multiplier. CHn Output Code = (GAINCAL_CHn + 1) * ADC CHn Output Code. This register is a Don’t Care if EN_GAINCAL = 0 (Gain calibration disabled) but its value is not cleared by the EN_GAINCAL bit. |
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