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MCP3910 Datasheet(PDF) 74 Page - Microchip Technology |
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MCP3910 Datasheet(HTML) 74 Page - Microchip Technology |
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74 / 90 page ![]() MCP3910 DS20005116D-page 74 2012-2020 Microchip Technology Inc. bit 15-13 OSR[2:0] Oversampling Ratio for Delta-Sigma A/D Conversion bits (all channels, f d/fS) 111 = 4096 (f d = 244 sps for MCLK = 4 MHz, fs =AMCLK =1 MHz) 110 = 2048 (f d = 488 sps for MCLK = 4 MHz, fs =AMCLK =1 MHz) 101 = 1024 (f d = 976 sps for MCLK = 4 MHz, fs =AMCLK =1 MHz) 100 = 512 (f d = 1.953 ksps for MCLK = 4 MHz, fs = AMCLK = 1 MHz) 011 = 256 (f d = 3.90625 ksps for MCLK = 4 MHz, fs = AMCLK = 1 MHz) (default) 010 = 128 (f d = 7.8125 ksps for MCLK = 4 MHz, fs =AMCLK =1 MHz) 001 = 64 (f d = 15.625 ksps for MCLK = 4 MHz, fs = AMCLK = 1 MHz) 000 = 32 (f d = 31.25 ksps for MCLK = 4 MHz, fs =AMCLK = 1 MHz) bit 12-8 Unimplemented: Read as ‘0’ bit 7-0 VREFCAL[7:0]: Internal Voltage Temperature Coefficient Value bits (See Section 5.6.3 “Temperature Compensation (VREFCAL[7:0])” for complete description.) REGISTER 9-6: CONFIG0: CONFIGURATION REGISTER 0 (CONTINUED) |
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