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FXPS7115D4S Datasheet(PDF) 49 Page - NXP Semiconductors |
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FXPS7115D4S Datasheet(HTML) 49 Page - NXP Semiconductors |
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49 / 74 page  NXP Semiconductors FXPS7115D4S Digital absolute pressure sensor, 40 kPa to 115 kPa register is read. To avoid data mismatch, the user is always required to read the registers in sequence, P_xxx_L register first, followed by the P_xxx_H register. Location Bit Address Symbol 7 6 5 4 3 2 1 0 6Ch P_MAX_L P_MAX[7:0] 6Dh P_MAX_H P_MAX[15:8] 6Eh P_MIN_L P_MIN[7:0] 6Fh P_MIN_H P_MIN[15:8] Factory default 0 0 0 0 0 0 0 0 Access R R R R R R R R Table 84. P_Max and P_Min registers (address 6Ch to 6Fh) bit allocation 7.7.21 FRT - free running timer registers (addresses 78h to 7Dh) The free running timer registers are read-only registers that contain a 48-bit free running timer. The free running timer is clocked by the main oscillator frequency and increments every 100 ns. Location Bit Address Symbol 7 6 5 4 3 2 1 0 78h FRT0 FRT[7:0] 79h FRT1 FRT[15:8] 7Ah FRT2 FRT[23:16] 7Bh FRT3 FRT[31:24] 7Ch FRT4 FRT[39:32] 7Dh FRT5 FRT[47:40] Access R R R R R R R R Table 85. FRT - free running timer registers (addresses 78h to 7Dh) bit allocation 7.7.22 IC type register (Address C0h) The IC type register is a factory programmable OTP register that contains the IC type as defined below. This register is included in the factory programmed OTP array error detection. This register is readable in SPI mode or I2C mode when ENDINIT is not set. Bit 7 6 5 4 3 2 1 0 Symbol ICTYPEID[7:0] Reset 0 0 0 0 0 0 1 0 Access R R R R R R R R Table 86. IC TYPE REGISTER (ICTYPEID address C0h) bit allocation 7.7.23 IC manufacturer revision register (Address C1h) The IC manufacturer revision register is a factory programmable OTP register that contains the IC revision. The upper nibble contains the main IC revision. The lower nibble contains the sub IC revision. This register is included in the factory programmed OTP array error detection. This register is readable in SPI mode or I2C mode when ENDINIT is not set. FXPS7115D4S All information provided in this document is subject to legal disclaimers. © 2022 NXP B.V. All rights reserved. Objective data sheet Rev. 1 — 9 August 2022 49 / 74 |
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