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FXPS7115D4S Datasheet(PDF) 3 Page - NXP Semiconductors |
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FXPS7115D4S Datasheet(HTML) 3 Page - NXP Semiconductors |
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3 / 74 page  NXP Semiconductors FXPS7115D4S Digital absolute pressure sensor, 40 kPa to 115 kPa 5 Block diagram aaa-029726 P-CELL 0 C2V GAIN VREF VREF P-CELL 1 AAF PABS Σ CONVERTER SINC FILTER COMMON MODE ERROR DETECTION TRIM VREG DSP IIR LPF PABS USER OFFSET ADJUST CONTROL LOGIC SS_B OTP ARRAY OSCILLATOR SPI/I2C LOW VOLTAGE DETECTION INTERNAL VOLTAGE REGULATOR LOW VOLTAGE DETECTION REFERENCE VOLTAGE VCC VSS VREF VREGA VREG SCLK/SCL MOSI MISO/SDA INT Figure 1. Block diagram of FXPS7115D4S 6 Pinning information 6.1 Pinning 1 2 3 4 VCC TEST INT VSS 12 11 10 9 17 TEST6 MISO/SDA MOSI SCLK/SCL aaa-029729 Transparent top view terminal 1 index area Figure 2. Pin configuration for 16-pin HQFN FXPS7115D4S All information provided in this document is subject to legal disclaimers. © 2022 NXP B.V. All rights reserved. Objective data sheet Rev. 1 — 9 August 2022 3 / 74 |
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