| Motor de Búsqueda de Datasheet de Componentes Electrónicos |
|
SPSB081 Datasheet(PDF) 44 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
SPSB081 Datasheet(HTML) 44 Page - STMicroelectronics |
|
44 / 135 page ![]() Figure 28. SDI frame 4.2.2.2 Operating code The operating code is used to distinguish between different access modes to the registers of the slave device. Table 13. Operation codes OC1 OC0 Description 0 0 Write operation 0 1 Read operation 1 0 Read & clear operation 1 1 Read device information A write operation leads to a modification of the addressed data by the payload if a write access is allowed (for example, control register, valid data). Beside this a shift out of the content (data present at communication start) of the registers is performed. A read operation shifts out the data present in the addressed register at communication start. The payload data is ignored and internal data are not modified. In addition, a burst read can be performed. A read & Clear Operation leads to a clear of addressed status bits. The bits to be cleared are defined first by address, second by payload bits set to ‘1’. Beside this a shift out of the content (data present at communication start) of the registers is performed. Note: Status registers, which change status during communication could be cleared by the actual read & clear operation and are not reported in actual communication or in the following communications. To avoid a loss of any reported status, that it is recommended just clear status registers, which are already reported in the previous communication (selective bitwise clear). 4.2.2.3 Advanced operation codes To provide beside the separate write of all control registers and the bitwise clear of all status registers, two advanced operation codes can be used to set all control registers to the default value and to clear all status registers. A ‘set all control registers to default’ command is performed when an OpCode ‘11’ at address b’111111 is performed. Note: Please consider that potential device specific write protected registers cannot be cleared with this command as therefore a device Power-on-Reset is needed. A ‘clear all status registers’ command is performed when an OpCode ‘10’ at address b’111111 is performed. SPSB081 Signal description DS14048 - Rev 1 page 44/135 |
|
Enlace URL |
| ¿ALLDATASHEET es útil para Ud.? [ DONATE ] |
Todo acerca de Alldatasheet | Publicidad | Contáctenos | Política de Privacidad | Enlace a la hoja de datos | Intercambio de Enlaces | Lista de Fabricantes All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |