L6364 datasheet(27/60 Pages) STMICROELECTRONICS

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9.3

Checksum calculation and verification

The checksum for an out-going message is calculated by the L6364, by logically exclusively OR'ing all LINK:CNT

octets of the message, with a starting value of 0x52.

For this calculation the written value of the Checksum register should be zero. The Checksum is then compacted

from 8 to 6 bits using the algorithm of Table 26:

Table 26. Checksum compaction

Bit

Calculation

C[5]

D[7] xor D[5] xor D[3] xor D[1]

C[4]

D[6] xor D[4] xor D[2] xor D[0]

C[3]

D[7] xor D[6]

C[2]

D[5] xor D[4]

C[1]

D[3] xor D[2]

C[0]

D[1] xor D[0]

The L6364 then inserts this 6-bit checksum into the lower bits of the last octet sent (“Checksum/status octet”).

Table 27. Checksum/status (CKS) octet

MSB

LSB

Event flag

PD Invalid

Checksum

The L6364 calculates the expected checksum for an incoming message, by exclusively OR'ing the octets of the

message, with a starting value of 0x52.

For this calculation the Checksum/M-sequence type (CKT) octet is used, but with all of the bits of the Checksum

field set to zero.

The calculated and expected checksum are compared and STATUS:CHK is set accordingly.

9.4

Data signal receive

The baud rate for signal reception is set by the CFG:BD bit. Both 38.4.4k Baud and 230.4k Baud are supported.

The CQ data level is monitored for signals, filtering out pulses with a duration of less than (1/16) * TBIT, see

Table 5. The decision threshold for the CQ data level is determined by the CFG:RF bit.

Where this is '0', the IO-Link standard absolute levels are used, and where the bit is '1' the threshold is referred

to VVPLUS/2. The first transition is the start reference of the frame. After this, data is sampled at the center of

each bit time. Bits are read into the data buffer, removing the start and stop bits. The fill level is recorded in the

LINK:CNT field.

Once the expected number of UART frames have been read, the checksum and parity bits for the message

are checked, and the STATUS:CHK bit set appropriately. The STATUS:DAT status bit is set, and an interrupt

is generated. Consecutive UART frames are expected from the master within a period of 4xTBIT. If this time is

exceeded, then both STATUS:DAT and STATUS:CHK bits are set and an interrupt is generated.

The L6364 then enters the Transmit state and waits for the microcontroller to read the data and prepare a return

message, signaling completion by writing a '1' to either the LINK:SND or LINK:END register bits.

9.5

Data output

The baud rate for transmission is set by the CFG:BD bit. Both 38.4.4k Baud and 230.4k Baud are supported.

The number of message octets for transmission are written into the LINK:CNT field and sent following writing bit

LINK:SND. The START, STOP and PARITY bits are appended to create the UART frames, and the checksum

calculated and stuffed in the message.

L6364

Checksum calculation and verification

DS13363 - Rev 4

page 27/60

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