L6364 datasheet(18/60 Pages) STMICROELECTRONICS

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8.1.6

Data interrupt handling

If the STATUS:DAT bit is read as active (high) on an SPI access, then the L6364 is halted in a WAIT condition and

is waiting for either a LINK:END or LINK:SND command from the microcontroller.

While the L6364 is in the WAIT condition the interrupt pin (INT), the STATUS:INT bit and the STATUS:DAT bit

remain active continuously.

Data can be read and written to the L6364 registers while in the WAIT condition.

Typically the LINK register and FR registers are accessed to read the incoming data, and the FR registers are

written to set up the outgoing data. As the L6364 is halted, it doesn't generate further data interrupts in the WAIT

condition.

When the microcontroller sends either a LINK:END or LINK:SND command, the interrupt pin (INT), the

STATUS:INT bit and the data bit, STATUS:DAT, are cleared within 220 ns of the last SCK edge of the SPI

write access.

If the microcontroller detects an active interrupt after the SPI access, or if the STATUS:DAT bit is read as

active (high) on a subsequent SPI access, then new data is available.

The LINK register is duplicated as LINK2 at address 0xF to optimize sequential SPI access:

•

a sequential SPI read can be used to read the LINK2 register and then the frame registers in one SPI

operation.

•

a sequential SPI write (including SND bit) can be used to write the LINK2 register and then the frame

registers. Transmission starts once the FR0 register is written and the micro-controller must ensure that the

subsequent registers have valid values before the start of transmission of the respective octets.

8.1.7

Short-circuit, overtemperature and undervoltage interrupt handling

The INT pin and the STATUS:INT bit are additionally active (high) if the last value of the short-circuit, undervoltage

or overtemperature status bits communicated on the SPI is different to the current value.

The L6364 handles short-circuit and overtemperature autonomously and does not require a reaction from the

microcontroller.

It is possible for these status bits to change at any time, and so the interrupt may be removed between entering

the interrupt service routine and reading the status on the SPI.

The interrupt is removed during the next SPI access to the L6364. If an SPI access is made without checking the

value of these bits, as is typical during processing of a data interrupt, it is normal to record the status values from

the final access, or to explicitly add an extra SPI access.

8.1.8

Interrupt handler structure

The interrupt handler will typically have the following sequence:

read the L6364 status with a read access from the LINK register

if (STATUS:DAT is active)

{

analyze the STATUS:CHK bit, read the FR registers

send LINK2:SND or LINK2:END as appropriate and write the response into the FR registers

};

update the microcontrollers copy of the short-circuit, undervoltage and overtemperature status based on the

status bits received in the previous access. Take action if necessary.

8.1.9

Changing to and from SIO mode

The L6364 should be placed into IO-Link mode as soon as communication with the master is established.

Typically a switch from SIO mode (CCTL:SIO='1') to IO-Link mode (CCTL:SIO='0') is made during the WAIT

condition when a valid message is detected from the master.

A switch from IO-Link mode to SIO mode is typically made shortly after the device response for the FALLBACK

command has been sent. The switches themselves are, however, only activated by the microcontroller after the

period defined in the IO-Link specification.

The L6364 may be switched from SIO mode to IO-Link mode at any time without disturbing data reception or

transmission. A switch from IO-Link mode to SIO mode may disturb data reception if a master is in the process of

transmitting, and the UART is therefore reset if this occurs.

L6364

Multi-octet UART mode

DS13363 - Rev 4

page 18/60

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