PPC5604BAMLL4R datasheet(42/109 Pages) NXP

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MPC5604B/C Microcontroller Data Sheet, Rev. 15

Package pinouts and signal descriptions

NXP Semiconductors

2.15.4

Output pin transition times

2.15.5

I/O pad current specification

The I/O pads are distributed across the I/O supply segment. Each I/O supply segment is associated to a

VDD/VSS supply pair as described in Table 21.

Table 20. Output pin transition times

Symbol C

Parameter

Conditions1

1 V

DD = 3.3 V ± 10% / 5.0 V ± 10%, TA = −40 to 125 °C, unless otherwise specified

Value

Unit

Min Typ Max

ttr CC D Output transition time output

pin2

SLOW configuration

2 C

L includes device and package capacitances (CPKG < 5 pF).

CL = 25 pF

VDD = 5.0 V ± 10%, PAD3V5V = 0

—

TCL = 50 pF

—

100

DCL = 100 pF

—

125

DCL = 25 pF

VDD = 3.3 V ± 10%, PAD3V5V = 1

—

TCL = 50 pF

—

100

DCL = 100 pF

—

125

ttr CC D Output transition time output

pin2

MEDIUM configuration

CL = 25 pF

VDD = 5.0 V ± 10%, PAD3V5V = 0

SIUL.PCRx.SRC = 1

—

TCL = 50 pF

—

DCL = 100 pF

—

DCL = 25 pF

VDD = 3.3 V ± 10%, PAD3V5V = 1

SIUL.PCRx.SRC = 1

——

TCL = 50 pF

—

DCL = 100 pF

—

ttr CC D Output transition time output

pin2

FAST configuration

CL = 25 pF

VDD = 5.0 V ± 10%, PAD3V5V = 0

—

CL = 50 pF

—

CL = 100 pF

—

CL = 25 pF

VDD = 3.3 V ± 10%, PAD3V5V = 1

—

CL = 50 pF

—

CL = 100 pF

—

Table 21. I/O supply segment

Package

Supply segment

345

208 MAPBGA1

Equivalent to 144 LQFP segment pad distribution

MCKO

MDOn/MSEO

144 LQFP

pin20–pin49

pin51–pin99

pin100–pin122 pin 123–pin19

—

100 LQFP

pin16–pin35

pin37–pin69

pin70–pin83

pin 84–pin15

—

64 LQFP

pin8–pin26

pin28–pin55

pin56–pin7

—

PPC5604BAMLL4R Datasheet(PDF) 42 Page - NXP Semiconductors

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