STM32H750IB datasheet(46/337 Pages) STMICROELECTRONICS

46 / 337 page

Functional overview

STM32H750VB STM32H750ZB STM32H750IB STM32H750XB

46/336

DS12556 Rev 6

All USART have a clock domain independent from the CPU clock, allowing the USARTx to

wake up the MCU from Stop mode.The wakeup from Stop mode is programmable and can

be done on:

•

Start bit detection

•

Any received data frame

•

A specific programmed data frame

•

Specific TXFIFO/RXFIFO status when FIFO mode is enabled.

All USART interfaces can be served by the DMA controller.

3.33

Low-power universal asynchronous receiver transmitter

(LPUART)

The device embeds one Low-Power UART (LPUART1). The LPUART supports

asynchronous serial communication with minimum power consumption. It supports half

duplex single wire communication and modem operations (CTS/RTS). It allows

multiprocessor communication.

The LPUARTs embed a Transmit FIFO (TXFIFO) and a Receive FIFO (RXFIFO). FIFO

mode is enabled by software and is disabled by default.

Table 5. USART features

USART modes/features(1)

1. X = supported.

USART1/2/3/6

UART4/5/7/8

Hardware flow control for modem

Continuous communication using DMA

Multiprocessor communication

Synchronous mode (Master/Slave)

Smartcard mode

Single-wire Half-duplex communication

IrDA SIR ENDEC block

LIN mode

Dual clock domain and wakeup from low power mode

Receiver timeout interrupt

Modbus communication

Auto baud rate detection

Driver Enable

USART data length

7, 8 and 9 bits

Tx/Rx FIFO

Tx/Rx FIFO size

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