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HMC1126ACEZ-R7 Datasheet(PDF) 18 Page - Analog Devices

No. de pieza HMC1126ACEZ-R7
Descripción Electrónicos  GaAs, pHEMT, Low Noise Amplifier, 400 MHz to 52 GHz
PDF  21 Pages
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Fabricante Electrónico  AD [Analog Devices]
Página de inicio  http://www.analog.com
Logo AD - Analog Devices

HMC1126ACEZ-R7 Datasheet(HTML) 18 Page - Analog Devices

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HMC1126ACEZ
Data Sheet
Rev. 0 | Page 18 of 21
RFIN
VGG1
VGG2
R2
4kΩ
R1
1kΩ
RFOUT
VDD
C21
10µF
VDD1
C6
4.7µF
R4
2.05Ω
C22
0.1µF
R14
1kΩ
R15
3.32kΩ
R16
1.69kΩ
R10
15.3kΩ
R5
10kΩ
VLDOCC
5.06V
C9
10µF
+
CURALM
EN
BGCAP
PORCAP
VDIGFB
VDIG
VDD1
TRGOUT
AGND
VNEGFB
VNEGIN
VGATEFB
VGATE
VDRAIN
VDRAIN
17
8
1
2
3
4
5
6
7
18
19
20
21
22
23
24
6
5
4
3
2
1
13
14
15
16
17
18
HMC920LP5E
HMC1126ACEZ
C6
4.7µF
C19
22µF
VDD
5.3V
VDRAIN = 5V
IDRAIN = 120mA
C24
100pF
Figure 59. Application Circuit Using the HMC920LP5E with the HMC1126ACEZ (Additional Circuitry Omitted for Clarity)
HMC920LP5E Bias Sequence
When the HMC920LP5E bias control circuit is set up, the
HMC1126ACEZ bias can be toggled on and off by applying 3.5 V
(high) or 0 V (low) to the EN pin of the HMC920LP5E. If EN is
left floating, the pin floats high. When EN is set to 3.5 V,
VGATE initially drops to −2 V, and VDRAIN rises to 5 V. Then,
VGATE and VGG1 increase until IDRAIN equals 120 mA. The
closed control loop then regulates IDRAIN to 120 mA. When the
EN pin goes low, VGATE and VGG1 drop back to −2 V and
VDRAIN drops to 0 V.



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