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AM50DL128CH Datasheet(PDF) 53 Page - Advanced Micro Devices

No. de pieza AM50DL128CH
Descripción Electrónicos  STACKED MULTI-CHIP PACKAGE (MCP) FLASH MEMORY AND SRAM
PDF  64 Pages
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Fabricante Electrónico  AMD [Advanced Micro Devices]
Página de inicio  http://www.amd.com
Logo AMD - Advanced Micro Devices

AM50DL128CH Datasheet(HTML) 53 Page - Advanced Micro Devices

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October 6, 2003
Am50DL128CH
51
ADV ANCE
I N FO RMAT I O N
FLASH AC CHARACTERISTICS
Alternate CE#f Controlled Erase and Program Operations
Notes:
1. Not 100% tested.
2. See the “Flash Erase And Programming Performance” section for more information.
3. CE#f refers to active flash device being addressed (either CE#f1 or CE#f2).
Parameter
Speed
JEDEC
Std
Description
56
70
85
Unit
t
AVAV
t
WC
Write Cycle Time (Note 1)
Min
55
70
85
ns
t
AVWL
t
AS
Address Setup Time
Min
0
ns
t
ELAX
t
AH
Address Hold Time
Min
30
40
45
ns
t
DVEH
t
DS
Data Setup Time
Min
30
40
45
ns
t
EHDX
t
DH
Data Hold Time
Min
0
ns
t
GHEL
t
GHEL
Read Recovery Time Before Write
(OE# High to WE# Low)
Min
0
ns
t
WLEL
t
WS
WE# Setup Time
Min
0
ns
t
EHWH
t
WH
WE# Hold Time
Min
0
ns
t
ELEH
t
CP
CE#f Pulse Width
Min
25
40
45
ns
t
EHEL
t
CPH
CE#f Pulse Width High
Min
25
30
ns
t
WHWH1
t
WHWH1
Programming Operation
(Note 2)
Word
Typ
7
µs
t
WHWH1
t
WHWH1
Accelerated Programming Operation,
Word or Byte (Note 2)
Typ
4
µs
t
WHWH2
t
WHWH2
Sector Erase Operation (Note 2)
Typ
0.4
sec



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