STM32G47PBY3XXX datasheet(43/229 Pages) STMICROELECTRONICS

43 / 229 page

DS12712 Rev 3

43/229

STM32G473xB STM32G473xC STM32G473xE

Functional overview

3.33

Controller area network (FDCAN1, FDCAN2, FDCAN3)

The controller area network (CAN) subsystem consists of three CAN modules and a shared

message RAM memory.

The three CAN modules (FDCAN1, FDCAN2 and FDCAN3) are compliant with ISO 11898-1

(CAN protocol specification version 2.0 part A, B) and CAN FD protocol specification

version 1.0.

A 3-Kbyte message RAM memory implements filters, receive FIFOs, receive buffers,

transmit event FIFOs, transmit buffers. This message RAM is shared between the three

FDCAN modules.

3.34

Universal serial bus (USB)

The STM32G473xB/xC/xE devices embed a full-speed USB device peripheral compliant

with the USB specification version 2.0. The internal USB PHY supports USB FS signaling,

embedded DP pull-up and also battery charging detection according to Battery Charging

Specification Revision 1.2. The USB interface implements a full-speed (12 Mbit/s) function

interface with added support for USB 2.0 Link Power Management. It has software-

configurable endpoint setting with packet memory up-to 1 Kbyte and suspend/resume

support. It requires a precise 48 MHz clock which can be generated from the internal main

PLL (the clock source must use a HSE crystal oscillator) or by the internal 48 MHz oscillator

in automatic trimming mode. The synchronization for this oscillator can be taken from the

USB data stream itself (SOF signalization) which allows crystal less operation.

3.35

USB Type-C™ / USB Power Delivery controller (UCPD)

The device embeds one controller (UCPD) compliant with USB Type-C Rev. 1.2 and USB

Power Delivery Rev. 3.0 specifications.

The controller uses specific I/Os supporting the USB Type-C and USB Power Delivery

requirements, featuring:

•

USB Type-C pull-up (Rp, all values) and pull-down (Rd) resistors

•

“Dead battery” support

•

USB Power Delivery message transmission and reception

•

FRS (fast role swap) support

Data size configurable: 8-, 10-, 16-, 20-, 24-, 32-bit

FIFO size

X (8 word)

SPDIF

1. X: supported.

Table 10. SAI implementation for the features implementation (continued)

SAI features

Support(1)

STM32G47PBY3XXX Datasheet(PDF) 43 Page - STMicroelectronics

STM32G47PBY3XXX Datasheet(HTML) 43 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Descarga

Enlace URL