LPC47M14X datasheet(30/205 Pages) SMSC

30 / 205 page

SMSC DS – LPC47M14X

Page 30

Rev. 03/19/2001

BIT 0 and 1 DRIVE SELECT

These two bits are binary encoded for the drive selects, thereby allowing only one drive to be selected at one time.

BIT 2 nRESET

A logic "0" written to this bit resets the Floppy disk controller. This reset will remain active until a logic "1" is written to

this bit. This software reset does not affect the DSR and CCR registers, nor does it affect the other bits of the DOR

BIT 3 DMAEN

PC/AT and Model 30 Mode:

Writing this bit to logic "1" will enable the DMA and interrupt functions. This bit being a logic "0" will disable the DMA

and interrupt functions. This bit is a logic "0" after a reset and in these modes.

PS/2 Mode: In this mode the DMA and interrupt functions are always enabled. During a reset, this bit will be cleared

to a logic "0".

BIT 4 MOTOR ENABLE 0

This bit controls the MTR0 disk interface output. A logic "1" in this bit will cause the output pin to go active.

BIT 5 MOTOR ENABLE 1

This bit controls the MTR1 disk interface output. A logic "1" in this bit will cause the output pin to go active.

DRIVE

DOR VALUE

1CH

2DH

BIT 6 MOTOR ENABLE 2

The MTR2 disk interface output is not supported in the LPC47M14x.

BIT 7 MOTOR ENABLE 3

The MTR3 disk interface output is not supported in the LPC47M14x.

TAPE DRIVE REGISTER (TDR)

Address 3F3 READ/WRITE

The Tape Drive Register (TDR) is included for 82077 software compatibility and allows the user to assign tape

support to a particular drive during initialization. Any future references to that drive automatically invokes tape

support. The TDR Tape Select bits TDR.[1:0] determine the tape drive number. Table 4 illustrates the Tape Select Bit

encoding. Note that drive 0 is the boot device and cannot be assigned tape support. The remaining Tape Drive

Table 4 – Tape Select Bits

TAPE SEL1

(TDR.1)

TAPE SEL0

(TDR.0)

DRIVE

SELECTED

None

Table 5 – Internal 2 Drive Decode - Normal

DIGITAL OUTPUT REGISTER

DRIVE SELECT OUTPUTS

(ACTIVE LOW)

MOTOR ON OUTPUTS

(ACTIVE LOW)

Bit 7

Bit 6

Bit 5

Bit 4

Bit1

Bit 0

nDS1

nDS0

nMTR1

nMTR0

nBIT 5

nBIT 4

nBIT 5

nBIT 4

nBIT 5

nBIT 4

nBIT 5

nBIT 4

nBIT 5

nBIT 4

LPC47M14X Datasheet(PDF) 30 Page - SMSC Corporation

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